1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_memory.h" 27#include "os/os_time.h" 28#include "vl/vl_decoder.h" 29#include "vl/vl_video_buffer.h" 30 31#include "r300_context.h" 32#include "r300_texture.h" 33#include "r300_screen_buffer.h" 34#include "r300_state_inlines.h" 35#include "r300_public.h" 36 37#include "draw/draw_context.h" 38 39/* Return the identifier behind whom the brave coders responsible for this 40 * amalgamation of code, sweat, and duct tape, routinely obscure their names. 41 * 42 * ...I should have just put "Corbin Simpson", but I'm not that cool. 43 * 44 * (Or egotistical. Yet.) */ 45static const char* r300_get_vendor(struct pipe_screen* pscreen) 46{ 47 return "X.Org R300 Project"; 48} 49 50static const char* chip_families[] = { 51 "ATI R300", 52 "ATI R350", 53 "ATI RV350", 54 "ATI RV370", 55 "ATI RV380", 56 "ATI RS400", 57 "ATI RC410", 58 "ATI RS480", 59 "ATI R420", 60 "ATI R423", 61 "ATI R430", 62 "ATI R480", 63 "ATI R481", 64 "ATI RV410", 65 "ATI RS600", 66 "ATI RS690", 67 "ATI RS740", 68 "ATI RV515", 69 "ATI R520", 70 "ATI RV530", 71 "ATI R580", 72 "ATI RV560", 73 "ATI RV570" 74}; 75 76static const char* r300_get_name(struct pipe_screen* pscreen) 77{ 78 struct r300_screen* r300screen = r300_screen(pscreen); 79 80 return chip_families[r300screen->caps.family]; 81} 82 83static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 84{ 85 struct r300_screen* r300screen = r300_screen(pscreen); 86 boolean is_r500 = r300screen->caps.is_r500; 87 88 switch (param) { 89 /* Supported features (boolean caps). */ 90 case PIPE_CAP_NPOT_TEXTURES: 91 case PIPE_CAP_TWO_SIDED_STENCIL: 92 case PIPE_CAP_ANISOTROPIC_FILTER: 93 case PIPE_CAP_POINT_SPRITE: 94 case PIPE_CAP_OCCLUSION_QUERY: 95 case PIPE_CAP_TEXTURE_SHADOW_MAP: 96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 97 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 101 case PIPE_CAP_CONDITIONAL_RENDER: 102 case PIPE_CAP_TEXTURE_BARRIER: 103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS: 104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: 105 case PIPE_CAP_VERTEX_COLOR_CLAMPED: 106 case PIPE_CAP_USER_INDEX_BUFFERS: 107 case PIPE_CAP_USER_CONSTANT_BUFFERS: 108 return 1; 109 110 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: 111 return 16; 112 113 case PIPE_CAP_GLSL_FEATURE_LEVEL: 114 return 120; 115 116 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */ 117 case PIPE_CAP_TEXTURE_SWIZZLE: 118 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1; 119 120 /* Supported on r500 only. */ 121 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: 122 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 123 case PIPE_CAP_SM3: 124 return is_r500 ? 1 : 0; 125 126 /* Unsupported features. */ 127 case PIPE_CAP_TIMER_QUERY: 128 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: 129 case PIPE_CAP_INDEP_BLEND_ENABLE: 130 case PIPE_CAP_INDEP_BLEND_FUNC: 131 case PIPE_CAP_DEPTH_CLIP_DISABLE: 132 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: 133 case PIPE_CAP_SHADER_STENCIL_EXPORT: 134 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: 135 case PIPE_CAP_TGSI_INSTANCEID: 136 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 137 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 138 case PIPE_CAP_SEAMLESS_CUBE_MAP: 139 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 140 case PIPE_CAP_SCALED_RESOLVE: 141 case PIPE_CAP_MIN_TEXEL_OFFSET: 142 case PIPE_CAP_MAX_TEXEL_OFFSET: 143 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: 144 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: 145 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: 146 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: 147 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: 148 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: 149 case PIPE_CAP_COMPUTE: 150 case PIPE_CAP_START_INSTANCE: 151 case PIPE_CAP_QUERY_TIMESTAMP: 152 return 0; 153 154 /* SWTCL-only features. */ 155 case PIPE_CAP_PRIMITIVE_RESTART: 156 case PIPE_CAP_USER_VERTEX_BUFFERS: 157 return !r300screen->caps.has_tcl; 158 159 /* HWTCL-only features / limitations. */ 160 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: 161 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: 162 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: 163 return r300screen->caps.has_tcl; 164 165 /* Texturing. */ 166 case PIPE_CAP_MAX_COMBINED_SAMPLERS: 167 return r300screen->caps.num_tex_units; 168 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 169 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 170 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 171 /* 13 == 4096, 12 == 2048 */ 172 return is_r500 ? 13 : 12; 173 174 /* Render targets. */ 175 case PIPE_CAP_MAX_RENDER_TARGETS: 176 return 4; 177 } 178 return 0; 179} 180 181static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) 182{ 183 struct r300_screen* r300screen = r300_screen(pscreen); 184 boolean is_r400 = r300screen->caps.is_r400; 185 boolean is_r500 = r300screen->caps.is_r500; 186 187 switch (shader) { 188 case PIPE_SHADER_FRAGMENT: 189 switch (param) 190 { 191 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 192 return is_r500 || is_r400 ? 512 : 96; 193 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 194 return is_r500 || is_r400 ? 512 : 64; 195 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 196 return is_r500 || is_r400 ? 512 : 32; 197 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 198 return is_r500 ? 511 : 4; 199 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 200 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */ 201 /* Fragment shader limits. */ 202 case PIPE_SHADER_CAP_MAX_INPUTS: 203 /* 2 colors + 8 texcoords are always supported 204 * (minus fog and wpos). 205 * 206 * R500 has the ability to turn 3rd and 4th color into 207 * additional texcoords but there is no two-sided color 208 * selection then. However the facing bit can be used instead. */ 209 return 10; 210 case PIPE_SHADER_CAP_MAX_CONSTS: 211 return is_r500 ? 256 : 32; 212 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 213 return 1; 214 case PIPE_SHADER_CAP_MAX_TEMPS: 215 return is_r500 ? 128 : is_r400 ? 64 : 32; 216 case PIPE_SHADER_CAP_MAX_PREDS: 217 return is_r500 ? 1 : 0; 218 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 219 return r300screen->caps.num_tex_units; 220 case PIPE_SHADER_CAP_MAX_ADDRS: 221 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 222 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 223 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 224 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 225 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 226 case PIPE_SHADER_CAP_SUBROUTINES: 227 case PIPE_SHADER_CAP_INTEGERS: 228 return 0; 229 case PIPE_SHADER_CAP_PREFERRED_IR: 230 return PIPE_SHADER_IR_TGSI; 231 } 232 break; 233 case PIPE_SHADER_VERTEX: 234 switch (param) 235 { 236 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 237 case PIPE_SHADER_CAP_SUBROUTINES: 238 return 0; 239 default:; 240 } 241 242 if (!r300screen->caps.has_tcl) { 243 return draw_get_shader_param(shader, param); 244 } 245 246 switch (param) 247 { 248 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 249 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 250 return is_r500 ? 1024 : 256; 251 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 252 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */ 253 case PIPE_SHADER_CAP_MAX_INPUTS: 254 return 16; 255 case PIPE_SHADER_CAP_MAX_CONSTS: 256 return 256; 257 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 258 return 1; 259 case PIPE_SHADER_CAP_MAX_TEMPS: 260 return 32; 261 case PIPE_SHADER_CAP_MAX_ADDRS: 262 return 1; /* XXX guessed */ 263 case PIPE_SHADER_CAP_MAX_PREDS: 264 return is_r500 ? 4 : 0; /* XXX guessed. */ 265 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 266 return 1; 267 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 268 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 269 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 270 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 271 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 272 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 273 case PIPE_SHADER_CAP_SUBROUTINES: 274 case PIPE_SHADER_CAP_INTEGERS: 275 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 276 return 0; 277 case PIPE_SHADER_CAP_PREFERRED_IR: 278 return PIPE_SHADER_IR_TGSI; 279 } 280 break; 281 } 282 return 0; 283} 284 285static float r300_get_paramf(struct pipe_screen* pscreen, 286 enum pipe_capf param) 287{ 288 struct r300_screen* r300screen = r300_screen(pscreen); 289 290 switch (param) { 291 case PIPE_CAPF_MAX_LINE_WIDTH: 292 case PIPE_CAPF_MAX_LINE_WIDTH_AA: 293 case PIPE_CAPF_MAX_POINT_WIDTH: 294 case PIPE_CAPF_MAX_POINT_WIDTH_AA: 295 /* The maximum dimensions of the colorbuffer are our practical 296 * rendering limits. 2048 pixels should be enough for anybody. */ 297 if (r300screen->caps.is_r500) { 298 return 4096.0f; 299 } else if (r300screen->caps.is_r400) { 300 return 4021.0f; 301 } else { 302 return 2560.0f; 303 } 304 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: 305 return 16.0f; 306 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: 307 return 16.0f; 308 case PIPE_CAPF_GUARD_BAND_LEFT: 309 case PIPE_CAPF_GUARD_BAND_TOP: 310 case PIPE_CAPF_GUARD_BAND_RIGHT: 311 case PIPE_CAPF_GUARD_BAND_BOTTOM: 312 /* XXX I don't know what these should be but the least we can do is 313 * silence the potential error message */ 314 return 0.0f; 315 default: 316 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n", 317 param); 318 return 0.0f; 319 } 320} 321 322static int r300_get_video_param(struct pipe_screen *screen, 323 enum pipe_video_profile profile, 324 enum pipe_video_cap param) 325{ 326 switch (param) { 327 case PIPE_VIDEO_CAP_SUPPORTED: 328 return vl_profile_supported(screen, profile); 329 case PIPE_VIDEO_CAP_NPOT_TEXTURES: 330 return 0; 331 case PIPE_VIDEO_CAP_MAX_WIDTH: 332 case PIPE_VIDEO_CAP_MAX_HEIGHT: 333 return vl_video_buffer_max_size(screen); 334 case PIPE_VIDEO_CAP_PREFERED_FORMAT: 335 return PIPE_FORMAT_NV12; 336 case PIPE_VIDEO_CAP_PREFERS_INTERLACED: 337 return false; 338 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: 339 return false; 340 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE: 341 return true; 342 default: 343 return 0; 344 } 345} 346 347static boolean r300_is_format_supported(struct pipe_screen* screen, 348 enum pipe_format format, 349 enum pipe_texture_target target, 350 unsigned sample_count, 351 unsigned usage) 352{ 353 uint32_t retval = 0; 354 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8; 355 boolean is_r500 = r300_screen(screen)->caps.is_r500; 356 boolean is_r400 = r300_screen(screen)->caps.is_r400; 357 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || 358 format == PIPE_FORMAT_R10G10B10X2_SNORM || 359 format == PIPE_FORMAT_B10G10R10A2_UNORM || 360 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; 361 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || 362 format == PIPE_FORMAT_RGTC1_SNORM || 363 format == PIPE_FORMAT_LATC1_UNORM || 364 format == PIPE_FORMAT_LATC1_SNORM; 365 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || 366 format == PIPE_FORMAT_RGTC2_SNORM || 367 format == PIPE_FORMAT_LATC2_UNORM || 368 format == PIPE_FORMAT_LATC2_SNORM; 369 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT || 370 format == PIPE_FORMAT_R16G16_FLOAT || 371 format == PIPE_FORMAT_A16_FLOAT || 372 format == PIPE_FORMAT_L16_FLOAT || 373 format == PIPE_FORMAT_L16A16_FLOAT || 374 format == PIPE_FORMAT_I16_FLOAT; 375 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || 376 format == PIPE_FORMAT_R16G16_FLOAT || 377 format == PIPE_FORMAT_R16G16B16_FLOAT || 378 format == PIPE_FORMAT_R16G16B16A16_FLOAT; 379 380 if (!util_format_is_supported(format, usage)) 381 return FALSE; 382 383 /* Check multisampling support. */ 384 switch (sample_count) { 385 case 0: 386 case 1: 387 break; 388 case 2: 389 case 3: 390 case 4: 391 case 6: 392 return FALSE; 393#if 0 394 if (usage != PIPE_BIND_RENDER_TARGET || 395 !util_format_is_rgba8_variant( 396 util_format_description(format))) { 397 return FALSE; 398 } 399#endif 400 break; 401 default: 402 return FALSE; 403 } 404 405 /* Check sampler format support. */ 406 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 407 /* ATI1N is r5xx-only. */ 408 (is_r500 || !is_ati1n) && 409 /* ATI2N is supported on r4xx-r5xx. */ 410 (is_r400 || is_r500 || !is_ati2n) && 411 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */ 412 (drm_2_8_0 || !is_x16f_xy16f) && 413 r300_is_sampler_format_supported(format)) { 414 retval |= PIPE_BIND_SAMPLER_VIEW; 415 } 416 417 /* Check colorbuffer format support. */ 418 if ((usage & (PIPE_BIND_RENDER_TARGET | 419 PIPE_BIND_DISPLAY_TARGET | 420 PIPE_BIND_SCANOUT | 421 PIPE_BIND_SHARED)) && 422 /* 2101010 cannot be rendered to on non-r5xx. */ 423 (!is_color2101010 || (is_r500 && drm_2_8_0)) && 424 r300_is_colorbuffer_format_supported(format)) { 425 retval |= usage & 426 (PIPE_BIND_RENDER_TARGET | 427 PIPE_BIND_DISPLAY_TARGET | 428 PIPE_BIND_SCANOUT | 429 PIPE_BIND_SHARED); 430 } 431 432 /* Check depth-stencil format support. */ 433 if (usage & PIPE_BIND_DEPTH_STENCIL && 434 r300_is_zs_format_supported(format)) { 435 retval |= PIPE_BIND_DEPTH_STENCIL; 436 } 437 438 /* Check vertex buffer format support. */ 439 if (usage & PIPE_BIND_VERTEX_BUFFER) { 440 if (r300_screen(screen)->caps.has_tcl) { 441 /* Half float is supported on >= R400. */ 442 if ((is_r400 || is_r500 || !is_half_float) && 443 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) { 444 retval |= PIPE_BIND_VERTEX_BUFFER; 445 } 446 } else { 447 /* SW TCL */ 448 if (!util_format_is_pure_integer(format)) { 449 retval |= PIPE_BIND_VERTEX_BUFFER; 450 } 451 } 452 } 453 454 /* Transfers are always supported. */ 455 if (usage & PIPE_BIND_TRANSFER_READ) 456 retval |= PIPE_BIND_TRANSFER_READ; 457 if (usage & PIPE_BIND_TRANSFER_WRITE) 458 retval |= PIPE_BIND_TRANSFER_WRITE; 459 460 return retval == usage; 461} 462 463static void r300_destroy_screen(struct pipe_screen* pscreen) 464{ 465 struct r300_screen* r300screen = r300_screen(pscreen); 466 struct radeon_winsys *rws = radeon_winsys(pscreen); 467 468 if (rws) 469 rws->destroy(rws); 470 471 FREE(r300screen); 472} 473 474static void r300_fence_reference(struct pipe_screen *screen, 475 struct pipe_fence_handle **ptr, 476 struct pipe_fence_handle *fence) 477{ 478 pb_reference((struct pb_buffer**)ptr, 479 (struct pb_buffer*)fence); 480} 481 482static boolean r300_fence_signalled(struct pipe_screen *screen, 483 struct pipe_fence_handle *fence) 484{ 485 struct radeon_winsys *rws = r300_screen(screen)->rws; 486 struct pb_buffer *rfence = (struct pb_buffer*)fence; 487 488 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE); 489} 490 491static boolean r300_fence_finish(struct pipe_screen *screen, 492 struct pipe_fence_handle *fence, 493 uint64_t timeout) 494{ 495 struct radeon_winsys *rws = r300_screen(screen)->rws; 496 struct pb_buffer *rfence = (struct pb_buffer*)fence; 497 498 if (timeout != PIPE_TIMEOUT_INFINITE) { 499 int64_t start_time = os_time_get(); 500 501 /* Convert to microseconds. */ 502 timeout /= 1000; 503 504 /* Wait in a loop. */ 505 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) { 506 if (os_time_get() - start_time >= timeout) { 507 return FALSE; 508 } 509 os_time_sleep(10); 510 } 511 return TRUE; 512 } 513 514 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE); 515 return TRUE; 516} 517 518struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) 519{ 520 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); 521 522 if (!r300screen) { 523 FREE(r300screen); 524 return NULL; 525 } 526 527 rws->query_info(rws, &r300screen->info); 528 529 r300_init_debug(r300screen); 530 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps); 531 532 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK)) 533 r300screen->caps.zmask_ram = 0; 534 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) 535 r300screen->caps.hiz_ram = 0; 536 537 if (r300screen->info.drm_minor < 8) 538 r300screen->caps.has_us_format = FALSE; 539 540 r300screen->rws = rws; 541 r300screen->screen.destroy = r300_destroy_screen; 542 r300screen->screen.get_name = r300_get_name; 543 r300screen->screen.get_vendor = r300_get_vendor; 544 r300screen->screen.get_param = r300_get_param; 545 r300screen->screen.get_shader_param = r300_get_shader_param; 546 r300screen->screen.get_paramf = r300_get_paramf; 547 r300screen->screen.get_video_param = r300_get_video_param; 548 r300screen->screen.is_format_supported = r300_is_format_supported; 549 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported; 550 r300screen->screen.context_create = r300_create_context; 551 r300screen->screen.fence_reference = r300_fence_reference; 552 r300screen->screen.fence_signalled = r300_fence_signalled; 553 r300screen->screen.fence_finish = r300_fence_finish; 554 555 r300_init_screen_resource_functions(r300screen); 556 557 util_format_s3tc_init(); 558 559 return &r300screen->screen; 560} 561