1// Copyright (c) 2004, Google Inc. 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: 7// 8// * Redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer. 10// * Redistributions in binary form must reproduce the above 11// copyright notice, this list of conditions and the following disclaimer 12// in the documentation and/or other materials provided with the 13// distribution. 14// * Neither the name of Google Inc. nor the names of its 15// contributors may be used to endorse or promote products derived from 16// this software without specific prior written permission. 17// 18// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 30// ---------------------------------------------------------------------- 31// CycleClock 32// A CycleClock tells you the current time in Cycles. The "time" 33// is actually time since power-on. This is like time() but doesn't 34// involve a system call and is much more precise. 35// 36// NOTE: Not all cpu/platform/kernel combinations guarantee that this 37// clock increments at a constant rate or is synchronized across all logical 38// cpus in a system. 39// 40// Also, in some out of order CPU implementations, the CycleClock is not 41// serializing. So if you're trying to count at cycles granularity, your 42// data might be inaccurate due to out of order instruction execution. 43// ---------------------------------------------------------------------- 44 45#ifndef GOOGLE_BASE_CYCLECLOCK_H_ 46#define GOOGLE_BASE_CYCLECLOCK_H_ 47 48#include "base/basictypes.h" // make sure we get the def for int64 49#include "base/arm_instruction_set_select.h" 50// base/sysinfo.h is really big and we don't want to include it unless 51// it is necessary. 52#if defined(__arm__) || defined(__mips__) 53# include "base/sysinfo.h" 54#endif 55#if defined(__MACH__) && defined(__APPLE__) 56# include <mach/mach_time.h> 57#endif 58// For MSVC, we want to use '_asm rdtsc' when possible (since it works 59// with even ancient MSVC compilers), and when not possible the 60// __rdtsc intrinsic, declared in <intrin.h>. Unfortunately, in some 61// environments, <windows.h> and <intrin.h> have conflicting 62// declarations of some other intrinsics, breaking compilation. 63// Therefore, we simply declare __rdtsc ourselves. See also 64// http://connect.microsoft.com/VisualStudio/feedback/details/262047 65#if defined(_MSC_VER) && !defined(_M_IX86) 66extern "C" uint64 __rdtsc(); 67#pragma intrinsic(__rdtsc) 68#endif 69#if defined(ARMV3) || defined(__mips__) 70#ifdef HAVE_SYS_TIME_H 71#include <sys/time.h> 72#endif 73#endif 74 75// NOTE: only i386 and x86_64 have been well tested. 76// PPC, sparc, alpha, and ia64 are based on 77// http://peter.kuscsik.com/wordpress/?p=14 78// with modifications by m3b. See also 79// https://setisvn.ssl.berkeley.edu/svn/lib/fftw-3.0.1/kernel/cycle.h 80struct CycleClock { 81 // This should return the number of cycles since power-on. Thread-safe. 82 static inline int64 Now() { 83#if defined(__MACH__) && defined(__APPLE__) 84 // this goes at the top because we need ALL Macs, regardless of 85 // architecture, to return the number of "mach time units" that 86 // have passed since startup. See sysinfo.cc where 87 // InitializeSystemInfo() sets the supposed cpu clock frequency of 88 // macs to the number of mach time units per second, not actual 89 // CPU clock frequency (which can change in the face of CPU 90 // frequency scaling). Also note that when the Mac sleeps, this 91 // counter pauses; it does not continue counting, nor does it 92 // reset to zero. 93 return mach_absolute_time(); 94#elif defined(__i386__) 95 int64 ret; 96 __asm__ volatile ("rdtsc" : "=A" (ret) ); 97 return ret; 98#elif defined(__x86_64__) || defined(__amd64__) 99 uint64 low, high; 100 __asm__ volatile ("rdtsc" : "=a" (low), "=d" (high)); 101 return (high << 32) | low; 102#elif defined(__powerpc__) || defined(__ppc__) 103 // This returns a time-base, which is not always precisely a cycle-count. 104 int64 tbl, tbu0, tbu1; 105 asm("mftbu %0" : "=r" (tbu0)); 106 asm("mftb %0" : "=r" (tbl)); 107 asm("mftbu %0" : "=r" (tbu1)); 108 tbl &= -static_cast<int64>(tbu0 == tbu1); 109 // high 32 bits in tbu1; low 32 bits in tbl (tbu0 is garbage) 110 return (tbu1 << 32) | tbl; 111#elif defined(__sparc__) 112 int64 tick; 113 asm(".byte 0x83, 0x41, 0x00, 0x00"); 114 asm("mov %%g1, %0" : "=r" (tick)); 115 return tick; 116#elif defined(__ia64__) 117 int64 itc; 118 asm("mov %0 = ar.itc" : "=r" (itc)); 119 return itc; 120#elif defined(_MSC_VER) && defined(_M_IX86) 121 // Older MSVC compilers (like 7.x) don't seem to support the 122 // __rdtsc intrinsic properly, so I prefer to use _asm instead 123 // when I know it will work. Otherwise, I'll use __rdtsc and hope 124 // the code is being compiled with a non-ancient compiler. 125 _asm rdtsc 126#elif defined(_MSC_VER) 127 return __rdtsc(); 128#elif defined(ARMV3) 129#if defined(ARMV6) // V6 is the earliest arch that has a standard cyclecount 130 uint32 pmccntr; 131 uint32 pmuseren; 132 uint32 pmcntenset; 133 // Read the user mode perf monitor counter access permissions. 134 asm volatile ("mrc p15, 0, %0, c9, c14, 0" : "=r" (pmuseren)); 135 if (pmuseren & 1) { // Allows reading perfmon counters for user mode code. 136 asm volatile ("mrc p15, 0, %0, c9, c12, 1" : "=r" (pmcntenset)); 137 if (pmcntenset & 0x80000000ul) { // Is it counting? 138 asm volatile ("mrc p15, 0, %0, c9, c13, 0" : "=r" (pmccntr)); 139 // The counter is set up to count every 64th cycle 140 return static_cast<int64>(pmccntr) * 64; // Should optimize to << 6 141 } 142 } 143#endif 144 struct timeval tv; 145 gettimeofday(&tv, NULL); 146 return static_cast<int64>((tv.tv_sec + tv.tv_usec * 0.000001) 147 * CyclesPerSecond()); 148#elif defined(__mips__) 149 // mips apparently only allows rdtsc for superusers, so we fall 150 // back to gettimeofday. It's possible clock_gettime would be better. 151 struct timeval tv; 152 gettimeofday(&tv, NULL); 153 return static_cast<int64>((tv.tv_sec + tv.tv_usec * 0.000001) 154 * CyclesPerSecond()); 155#else 156// The soft failover to a generic implementation is automatic only for ARM. 157// For other platforms the developer is expected to make an attempt to create 158// a fast implementation and use generic version if nothing better is available. 159#error You need to define CycleTimer for your O/S and CPU 160#endif 161 } 162}; 163 164 165#endif // GOOGLE_BASE_CYCLECLOCK_H_ 166