PHIElimination.cpp revision 0d34ac96dedd210999f3f9730d982149c2267f85
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "llvm/CodeGen/LiveVariables.h" 18#include "llvm/CodeGen/Passes.h" 19#include "llvm/CodeGen/MachineFunctionPass.h" 20#include "llvm/CodeGen/MachineInstr.h" 21#include "llvm/CodeGen/MachineRegisterInfo.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/Statistic.h" 26#include "llvm/Support/Compiler.h" 27#include <algorithm> 28#include <map> 29#include <set> 30using namespace llvm; 31 32STATISTIC(NumAtomic, "Number of atomic phis lowered"); 33//STATISTIC(NumSimple, "Number of simple phis lowered"); 34 35namespace { 36 struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass { 37 static char ID; // Pass identification, replacement for typeid 38 PNE() : MachineFunctionPass((intptr_t)&ID) {} 39 40 bool runOnMachineFunction(MachineFunction &Fn) { 41 analyzePHINodes(Fn); 42 43 bool Changed = false; 44 45 // Eliminate PHI instructions by inserting copies into predecessor blocks. 46 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) 47 Changed |= EliminatePHINodes(Fn, *I); 48 49 VRegPHIUseCount.clear(); 50 return Changed; 51 } 52 53 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 54 AU.addPreserved<LiveVariables>(); 55 AU.addPreservedID(MachineLoopInfoID); 56 AU.addPreservedID(MachineDominatorsID); 57 MachineFunctionPass::getAnalysisUsage(AU); 58 } 59 60 private: 61 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 62 /// in predecessor basic blocks. 63 /// 64 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 65 void LowerAtomicPHINode(MachineBasicBlock &MBB, 66 MachineBasicBlock::iterator AfterPHIsIt); 67 68 /// analyzePHINodes - Gather information about the PHI nodes in 69 /// here. In particular, we want to map the number of uses of a virtual 70 /// register which is used in a PHI node. We map that to the BB the 71 /// vreg is coming from. This is used later to determine when the vreg 72 /// is killed in the BB. 73 /// 74 void analyzePHINodes(const MachineFunction& Fn); 75 76 typedef std::pair<const MachineBasicBlock*, unsigned> BBVRegPair; 77 typedef std::map<BBVRegPair, unsigned> VRegPHIUse; 78 79 VRegPHIUse VRegPHIUseCount; 80 }; 81 82 char PNE::ID = 0; 83 RegisterPass<PNE> X("phi-node-elimination", 84 "Eliminate PHI nodes for register allocation"); 85} 86 87const PassInfo *llvm::PHIEliminationID = X.getPassInfo(); 88 89/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 90/// predecessor basic blocks. 91/// 92bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { 93 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI) 94 return false; // Quick exit for basic blocks without PHIs. 95 96 // Get an iterator to the first instruction after the last PHI node (this may 97 // also be the end of the basic block). 98 MachineBasicBlock::iterator AfterPHIsIt = MBB.begin(); 99 while (AfterPHIsIt != MBB.end() && 100 AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI) 101 ++AfterPHIsIt; // Skip over all of the PHI nodes... 102 103 while (MBB.front().getOpcode() == TargetInstrInfo::PHI) 104 LowerAtomicPHINode(MBB, AfterPHIsIt); 105 106 return true; 107} 108 109/// InstructionUsesRegister - Return true if the specified machine instr has a 110/// use of the specified register. 111static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) { 112 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) 113 if (MI->getOperand(i).isRegister() && 114 MI->getOperand(i).getReg() == SrcReg && 115 MI->getOperand(i).isUse()) 116 return true; 117 return false; 118} 119 120/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 121/// under the assuption that it needs to be lowered in a way that supports 122/// atomic execution of PHIs. This lowering method is always correct all of the 123/// time. 124void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, 125 MachineBasicBlock::iterator AfterPHIsIt) { 126 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 127 MachineInstr *MPhi = MBB.remove(MBB.begin()); 128 129 unsigned DestReg = MPhi->getOperand(0).getReg(); 130 131 // Create a new register for the incoming PHI arguments. 132 MachineFunction &MF = *MBB.getParent(); 133 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 134 unsigned IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 135 136 // Insert a register to register copy in the top of the current block (but 137 // after any remaining phi nodes) which copies the new incoming register 138 // into the phi node destination. 139 // 140 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 141 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC); 142 143 // Update live variable information if there is any... 144 LiveVariables *LV = getAnalysisToUpdate<LiveVariables>(); 145 if (LV) { 146 MachineInstr *PHICopy = prior(AfterPHIsIt); 147 148 // Increment use count of the newly created virtual register. 149 LV->getVarInfo(IncomingReg).NumUses++; 150 151 // Add information to LiveVariables to know that the incoming value is 152 // killed. Note that because the value is defined in several places (once 153 // each for each incoming block), the "def" block and instruction fields 154 // for the VarInfo is not filled in. 155 // 156 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 157 158 // Since we are going to be deleting the PHI node, if it is the last use 159 // of any registers, or if the value itself is dead, we need to move this 160 // information over to the new copy we just inserted. 161 // 162 LV->removeVirtualRegistersKilled(MPhi); 163 164 // If the result is dead, update LV. 165 if (MPhi->registerDefIsDead(DestReg)) { 166 LV->addVirtualRegisterDead(DestReg, PHICopy); 167 LV->removeVirtualRegistersDead(MPhi); 168 } 169 170 LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true; 171 } 172 173 // Adjust the VRegPHIUseCount map to account for the removal of this PHI 174 // node. 175 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 176 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(), 177 MPhi->getOperand(i).getReg())]; 178 179 // Now loop over all of the incoming arguments, changing them to copy into 180 // the IncomingReg register in the corresponding predecessor basic block. 181 // 182 std::set<MachineBasicBlock*> MBBsInsertedInto; 183 for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) { 184 unsigned SrcReg = MPhi->getOperand(i-1).getReg(); 185 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 186 "Machine PHI Operands must all be virtual registers!"); 187 188 // Get the MachineBasicBlock equivalent of the BasicBlock that is the 189 // source path the PHI. 190 MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMBB(); 191 192 // Check to make sure we haven't already emitted the copy for this block. 193 // This can happen because PHI nodes may have multiple entries for the 194 // same basic block. 195 if (!MBBsInsertedInto.insert(&opBlock).second) 196 continue; // If the copy has already been emitted, we're done. 197 198 // Get an iterator pointing to the first terminator in the block (or end()). 199 // This is the point where we can insert a copy if we'd like to. 200 MachineBasicBlock::iterator I = opBlock.getFirstTerminator(); 201 202 // Insert the copy. 203 TII->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC, RC); 204 205 // Now update live variable information if we have it. Otherwise we're done 206 if (!LV) continue; 207 208 // We want to be able to insert a kill of the register if this PHI 209 // (aka, the copy we just inserted) is the last use of the source 210 // value. Live variable analysis conservatively handles this by 211 // saying that the value is live until the end of the block the PHI 212 // entry lives in. If the value really is dead at the PHI copy, there 213 // will be no successor blocks which have the value live-in. 214 // 215 // Check to see if the copy is the last use, and if so, update the 216 // live variables information so that it knows the copy source 217 // instruction kills the incoming value. 218 // 219 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg); 220 InRegVI.UsedBlocks[opBlock.getNumber()] = true; 221 222 // Loop over all of the successors of the basic block, checking to see 223 // if the value is either live in the block, or if it is killed in the 224 // block. Also check to see if this register is in use by another PHI 225 // node which has not yet been eliminated. If so, it will be killed 226 // at an appropriate point later. 227 // 228 229 // Is it used by any PHI instructions in this block? 230 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0; 231 232 std::vector<MachineBasicBlock*> OpSuccBlocks; 233 234 // Otherwise, scan successors, including the BB the PHI node lives in. 235 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(), 236 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) { 237 MachineBasicBlock *SuccMBB = *SI; 238 239 // Is it alive in this successor? 240 unsigned SuccIdx = SuccMBB->getNumber(); 241 if (SuccIdx < InRegVI.AliveBlocks.size() && 242 InRegVI.AliveBlocks[SuccIdx]) { 243 ValueIsLive = true; 244 break; 245 } 246 247 OpSuccBlocks.push_back(SuccMBB); 248 } 249 250 // Check to see if this value is live because there is a use in a successor 251 // that kills it. 252 if (!ValueIsLive) { 253 switch (OpSuccBlocks.size()) { 254 case 1: { 255 MachineBasicBlock *MBB = OpSuccBlocks[0]; 256 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 257 if (InRegVI.Kills[i]->getParent() == MBB) { 258 ValueIsLive = true; 259 break; 260 } 261 break; 262 } 263 case 2: { 264 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1]; 265 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 266 if (InRegVI.Kills[i]->getParent() == MBB1 || 267 InRegVI.Kills[i]->getParent() == MBB2) { 268 ValueIsLive = true; 269 break; 270 } 271 break; 272 } 273 default: 274 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end()); 275 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 276 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(), 277 InRegVI.Kills[i]->getParent())) { 278 ValueIsLive = true; 279 break; 280 } 281 } 282 } 283 284 // Okay, if we now know that the value is not live out of the block, 285 // we can add a kill marker in this block saying that it kills the incoming 286 // value! 287 if (!ValueIsLive) { 288 // In our final twist, we have to decide which instruction kills the 289 // register. In most cases this is the copy, however, the first 290 // terminator instruction at the end of the block may also use the value. 291 // In this case, we should mark *it* as being the killing block, not the 292 // copy. 293 bool FirstTerminatorUsesValue = false; 294 if (I != opBlock.end()) { 295 FirstTerminatorUsesValue = InstructionUsesRegister(I, SrcReg); 296 297 // Check that no other terminators use values. 298#ifndef NDEBUG 299 for (MachineBasicBlock::iterator TI = next(I); TI != opBlock.end(); 300 ++TI) { 301 assert(!InstructionUsesRegister(TI, SrcReg) && 302 "Terminator instructions cannot use virtual registers unless" 303 "they are the first terminator in a block!"); 304 } 305#endif 306 } 307 308 MachineBasicBlock::iterator KillInst; 309 if (!FirstTerminatorUsesValue) 310 KillInst = prior(I); 311 else 312 KillInst = I; 313 314 // Finally, mark it killed. 315 LV->addVirtualRegisterKilled(SrcReg, KillInst); 316 317 // This vreg no longer lives all of the way through opBlock. 318 unsigned opBlockNum = opBlock.getNumber(); 319 if (opBlockNum < InRegVI.AliveBlocks.size()) 320 InRegVI.AliveBlocks[opBlockNum] = false; 321 } 322 } 323 324 // Really delete the PHI instruction now! 325 delete MPhi; 326 ++NumAtomic; 327} 328 329/// analyzePHINodes - Gather information about the PHI nodes in here. In 330/// particular, we want to map the number of uses of a virtual register which is 331/// used in a PHI node. We map that to the BB the vreg is coming from. This is 332/// used later to determine when the vreg is killed in the BB. 333/// 334void PNE::analyzePHINodes(const MachineFunction& Fn) { 335 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end(); 336 I != E; ++I) 337 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 338 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) 339 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 340 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(), 341 BBI->getOperand(i).getReg())]; 342} 343