PHIElimination.cpp revision 6130f66eaae89f8878590796977678afa8448926
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "llvm/CodeGen/LiveVariables.h" 18#include "llvm/CodeGen/Passes.h" 19#include "llvm/CodeGen/MachineFunctionPass.h" 20#include "llvm/CodeGen/MachineInstr.h" 21#include "llvm/CodeGen/MachineRegisterInfo.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include "llvm/ADT/STLExtras.h" 25#include "llvm/ADT/Statistic.h" 26#include "llvm/Support/Compiler.h" 27#include <set> 28#include <algorithm> 29using namespace llvm; 30 31STATISTIC(NumAtomic, "Number of atomic phis lowered"); 32//STATISTIC(NumSimple, "Number of simple phis lowered"); 33 34namespace { 35 struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass { 36 static char ID; // Pass identification, replacement for typeid 37 PNE() : MachineFunctionPass((intptr_t)&ID) {} 38 39 bool runOnMachineFunction(MachineFunction &Fn) { 40 analyzePHINodes(Fn); 41 42 bool Changed = false; 43 44 // Eliminate PHI instructions by inserting copies into predecessor blocks. 45 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) 46 Changed |= EliminatePHINodes(Fn, *I); 47 48 VRegPHIUseCount.clear(); 49 return Changed; 50 } 51 52 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 53 AU.addPreserved<LiveVariables>(); 54 AU.addPreservedID(MachineLoopInfoID); 55 AU.addPreservedID(MachineDominatorsID); 56 MachineFunctionPass::getAnalysisUsage(AU); 57 } 58 59 private: 60 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 61 /// in predecessor basic blocks. 62 /// 63 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 64 void LowerAtomicPHINode(MachineBasicBlock &MBB, 65 MachineBasicBlock::iterator AfterPHIsIt); 66 67 /// analyzePHINodes - Gather information about the PHI nodes in 68 /// here. In particular, we want to map the number of uses of a virtual 69 /// register which is used in a PHI node. We map that to the BB the 70 /// vreg is coming from. This is used later to determine when the vreg 71 /// is killed in the BB. 72 /// 73 void analyzePHINodes(const MachineFunction& Fn); 74 75 typedef std::pair<const MachineBasicBlock*, unsigned> BBVRegPair; 76 typedef std::map<BBVRegPair, unsigned> VRegPHIUse; 77 78 VRegPHIUse VRegPHIUseCount; 79 }; 80 81 char PNE::ID = 0; 82 RegisterPass<PNE> X("phi-node-elimination", 83 "Eliminate PHI nodes for register allocation"); 84} 85 86const PassInfo *llvm::PHIEliminationID = X.getPassInfo(); 87 88/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 89/// predecessor basic blocks. 90/// 91bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { 92 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI) 93 return false; // Quick exit for basic blocks without PHIs. 94 95 // Get an iterator to the first instruction after the last PHI node (this may 96 // also be the end of the basic block). 97 MachineBasicBlock::iterator AfterPHIsIt = MBB.begin(); 98 while (AfterPHIsIt != MBB.end() && 99 AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI) 100 ++AfterPHIsIt; // Skip over all of the PHI nodes... 101 102 while (MBB.front().getOpcode() == TargetInstrInfo::PHI) 103 LowerAtomicPHINode(MBB, AfterPHIsIt); 104 105 return true; 106} 107 108/// InstructionUsesRegister - Return true if the specified machine instr has a 109/// use of the specified register. 110static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) { 111 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) 112 if (MI->getOperand(i).isRegister() && 113 MI->getOperand(i).getReg() == SrcReg && 114 MI->getOperand(i).isUse()) 115 return true; 116 return false; 117} 118 119/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 120/// under the assuption that it needs to be lowered in a way that supports 121/// atomic execution of PHIs. This lowering method is always correct all of the 122/// time. 123void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, 124 MachineBasicBlock::iterator AfterPHIsIt) { 125 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 126 MachineInstr *MPhi = MBB.remove(MBB.begin()); 127 128 unsigned DestReg = MPhi->getOperand(0).getReg(); 129 130 // Create a new register for the incoming PHI arguments. 131 MachineFunction &MF = *MBB.getParent(); 132 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 133 unsigned IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 134 135 // Insert a register to register copy in the top of the current block (but 136 // after any remaining phi nodes) which copies the new incoming register 137 // into the phi node destination. 138 // 139 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 140 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC); 141 142 // Update live variable information if there is any... 143 LiveVariables *LV = getAnalysisToUpdate<LiveVariables>(); 144 if (LV) { 145 MachineInstr *PHICopy = prior(AfterPHIsIt); 146 147 // Increment use count of the newly created virtual register. 148 LV->getVarInfo(IncomingReg).NumUses++; 149 150 // Add information to LiveVariables to know that the incoming value is 151 // killed. Note that because the value is defined in several places (once 152 // each for each incoming block), the "def" block and instruction fields 153 // for the VarInfo is not filled in. 154 // 155 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 156 157 // Since we are going to be deleting the PHI node, if it is the last use 158 // of any registers, or if the value itself is dead, we need to move this 159 // information over to the new copy we just inserted. 160 // 161 LV->removeVirtualRegistersKilled(MPhi); 162 163 // If the result is dead, update LV. 164 if (MPhi->registerDefIsDead(DestReg)) { 165 LV->addVirtualRegisterDead(DestReg, PHICopy); 166 LV->removeVirtualRegistersDead(MPhi); 167 } 168 169 LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true; 170 } 171 172 // Adjust the VRegPHIUseCount map to account for the removal of this PHI 173 // node. 174 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 175 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(), 176 MPhi->getOperand(i).getReg())]; 177 178 // Now loop over all of the incoming arguments, changing them to copy into 179 // the IncomingReg register in the corresponding predecessor basic block. 180 // 181 std::set<MachineBasicBlock*> MBBsInsertedInto; 182 for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) { 183 unsigned SrcReg = MPhi->getOperand(i-1).getReg(); 184 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 185 "Machine PHI Operands must all be virtual registers!"); 186 187 // Get the MachineBasicBlock equivalent of the BasicBlock that is the 188 // source path the PHI. 189 MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMBB(); 190 191 // Check to make sure we haven't already emitted the copy for this block. 192 // This can happen because PHI nodes may have multiple entries for the 193 // same basic block. 194 if (!MBBsInsertedInto.insert(&opBlock).second) 195 continue; // If the copy has already been emitted, we're done. 196 197 // Get an iterator pointing to the first terminator in the block (or end()). 198 // This is the point where we can insert a copy if we'd like to. 199 MachineBasicBlock::iterator I = opBlock.getFirstTerminator(); 200 201 // Insert the copy. 202 TII->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC, RC); 203 204 // Now update live variable information if we have it. Otherwise we're done 205 if (!LV) continue; 206 207 // We want to be able to insert a kill of the register if this PHI 208 // (aka, the copy we just inserted) is the last use of the source 209 // value. Live variable analysis conservatively handles this by 210 // saying that the value is live until the end of the block the PHI 211 // entry lives in. If the value really is dead at the PHI copy, there 212 // will be no successor blocks which have the value live-in. 213 // 214 // Check to see if the copy is the last use, and if so, update the 215 // live variables information so that it knows the copy source 216 // instruction kills the incoming value. 217 // 218 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg); 219 InRegVI.UsedBlocks[opBlock.getNumber()] = true; 220 221 // Loop over all of the successors of the basic block, checking to see 222 // if the value is either live in the block, or if it is killed in the 223 // block. Also check to see if this register is in use by another PHI 224 // node which has not yet been eliminated. If so, it will be killed 225 // at an appropriate point later. 226 // 227 228 // Is it used by any PHI instructions in this block? 229 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0; 230 231 std::vector<MachineBasicBlock*> OpSuccBlocks; 232 233 // Otherwise, scan successors, including the BB the PHI node lives in. 234 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(), 235 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) { 236 MachineBasicBlock *SuccMBB = *SI; 237 238 // Is it alive in this successor? 239 unsigned SuccIdx = SuccMBB->getNumber(); 240 if (SuccIdx < InRegVI.AliveBlocks.size() && 241 InRegVI.AliveBlocks[SuccIdx]) { 242 ValueIsLive = true; 243 break; 244 } 245 246 OpSuccBlocks.push_back(SuccMBB); 247 } 248 249 // Check to see if this value is live because there is a use in a successor 250 // that kills it. 251 if (!ValueIsLive) { 252 switch (OpSuccBlocks.size()) { 253 case 1: { 254 MachineBasicBlock *MBB = OpSuccBlocks[0]; 255 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 256 if (InRegVI.Kills[i]->getParent() == MBB) { 257 ValueIsLive = true; 258 break; 259 } 260 break; 261 } 262 case 2: { 263 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1]; 264 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 265 if (InRegVI.Kills[i]->getParent() == MBB1 || 266 InRegVI.Kills[i]->getParent() == MBB2) { 267 ValueIsLive = true; 268 break; 269 } 270 break; 271 } 272 default: 273 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end()); 274 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 275 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(), 276 InRegVI.Kills[i]->getParent())) { 277 ValueIsLive = true; 278 break; 279 } 280 } 281 } 282 283 // Okay, if we now know that the value is not live out of the block, 284 // we can add a kill marker in this block saying that it kills the incoming 285 // value! 286 if (!ValueIsLive) { 287 // In our final twist, we have to decide which instruction kills the 288 // register. In most cases this is the copy, however, the first 289 // terminator instruction at the end of the block may also use the value. 290 // In this case, we should mark *it* as being the killing block, not the 291 // copy. 292 bool FirstTerminatorUsesValue = false; 293 if (I != opBlock.end()) { 294 FirstTerminatorUsesValue = InstructionUsesRegister(I, SrcReg); 295 296 // Check that no other terminators use values. 297#ifndef NDEBUG 298 for (MachineBasicBlock::iterator TI = next(I); TI != opBlock.end(); 299 ++TI) { 300 assert(!InstructionUsesRegister(TI, SrcReg) && 301 "Terminator instructions cannot use virtual registers unless" 302 "they are the first terminator in a block!"); 303 } 304#endif 305 } 306 307 MachineBasicBlock::iterator KillInst; 308 if (!FirstTerminatorUsesValue) 309 KillInst = prior(I); 310 else 311 KillInst = I; 312 313 // Finally, mark it killed. 314 LV->addVirtualRegisterKilled(SrcReg, KillInst); 315 316 // This vreg no longer lives all of the way through opBlock. 317 unsigned opBlockNum = opBlock.getNumber(); 318 if (opBlockNum < InRegVI.AliveBlocks.size()) 319 InRegVI.AliveBlocks[opBlockNum] = false; 320 } 321 } 322 323 // Really delete the PHI instruction now! 324 delete MPhi; 325 ++NumAtomic; 326} 327 328/// analyzePHINodes - Gather information about the PHI nodes in here. In 329/// particular, we want to map the number of uses of a virtual register which is 330/// used in a PHI node. We map that to the BB the vreg is coming from. This is 331/// used later to determine when the vreg is killed in the BB. 332/// 333void PNE::analyzePHINodes(const MachineFunction& Fn) { 334 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end(); 335 I != E; ++I) 336 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 337 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) 338 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 339 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(), 340 BBI->getOperand(i).getReg())]; 341} 342