PHIElimination.cpp revision cd9f79d845c9ed3fb621a62ebdf4beaf090a43f4
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "PHIElimination.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineRegisterInfo.h" 24#include "llvm/Target/TargetInstrInfo.h" 25#include "llvm/Function.h" 26#include "llvm/Target/TargetMachine.h" 27#include "llvm/ADT/SmallPtrSet.h" 28#include "llvm/ADT/STLExtras.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/Support/Compiler.h" 31#include "llvm/Support/Debug.h" 32#include <algorithm> 33#include <map> 34using namespace llvm; 35 36STATISTIC(NumAtomic, "Number of atomic phis lowered"); 37STATISTIC(NumReused, "Number of reused lowered phis"); 38 39char PHIElimination::ID = 0; 40static RegisterPass<PHIElimination> 41X("phi-node-elimination", "Eliminate PHI nodes for register allocation"); 42 43const PassInfo *const llvm::PHIEliminationID = &X; 44 45void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 46 AU.addPreserved<LiveVariables>(); 47 AU.addPreserved<MachineDominatorTree>(); 48 // rdar://7401784 This would be nice: 49 // AU.addPreservedID(MachineLoopInfoID); 50 MachineFunctionPass::getAnalysisUsage(AU); 51} 52 53bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &MF) { 54 MRI = &MF.getRegInfo(); 55 56 bool Changed = false; 57 58 // Split critical edges to help the coalescer 59 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) 60 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 61 Changed |= SplitPHIEdges(MF, *I, *LV); 62 63 // Populate VRegPHIUseCount 64 analyzePHINodes(MF); 65 66 // Eliminate PHI instructions by inserting copies into predecessor blocks. 67 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 68 Changed |= EliminatePHINodes(MF, *I); 69 70 // Remove dead IMPLICIT_DEF instructions. 71 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 72 E = ImpDefs.end(); I != E; ++I) { 73 MachineInstr *DefMI = *I; 74 unsigned DefReg = DefMI->getOperand(0).getReg(); 75 if (MRI->use_nodbg_empty(DefReg)) 76 DefMI->eraseFromParent(); 77 } 78 79 // Clean up the lowered PHI instructions. 80 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 81 I != E; ++I) 82 MF.DeleteMachineInstr(I->first); 83 84 LoweredPHIs.clear(); 85 ImpDefs.clear(); 86 VRegPHIUseCount.clear(); 87 88 return Changed; 89} 90 91/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 92/// predecessor basic blocks. 93/// 94bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF, 95 MachineBasicBlock &MBB) { 96 if (MBB.empty() || !MBB.front().isPHI()) 97 return false; // Quick exit for basic blocks without PHIs. 98 99 // Get an iterator to the first instruction after the last PHI node (this may 100 // also be the end of the basic block). 101 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin()); 102 103 while (MBB.front().isPHI()) 104 LowerAtomicPHINode(MBB, AfterPHIsIt); 105 106 return true; 107} 108 109/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 110/// are implicit_def's. 111static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 112 const MachineRegisterInfo *MRI) { 113 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 114 unsigned SrcReg = MPhi->getOperand(i).getReg(); 115 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 116 if (!DefMI || !DefMI->isImplicitDef()) 117 return false; 118 } 119 return true; 120} 121 122// FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg 123// when following the CFG edge to SuccMBB. This needs to be after any def of 124// SrcReg, but before any subsequent point where control flow might jump out of 125// the basic block. 126MachineBasicBlock::iterator 127llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB, 128 MachineBasicBlock &SuccMBB, 129 unsigned SrcReg) { 130 // Handle the trivial case trivially. 131 if (MBB.empty()) 132 return MBB.begin(); 133 134 // Usually, we just want to insert the copy before the first terminator 135 // instruction. However, for the edge going to a landing pad, we must insert 136 // the copy before the call/invoke instruction. 137 if (!SuccMBB.isLandingPad()) 138 return MBB.getFirstTerminator(); 139 140 // Discover any defs/uses in this basic block. 141 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB; 142 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg), 143 RE = MRI->reg_end(); RI != RE; ++RI) { 144 MachineInstr *DefUseMI = &*RI; 145 if (DefUseMI->getParent() == &MBB) 146 DefUsesInMBB.insert(DefUseMI); 147 } 148 149 MachineBasicBlock::iterator InsertPoint; 150 if (DefUsesInMBB.empty()) { 151 // No defs. Insert the copy at the start of the basic block. 152 InsertPoint = MBB.begin(); 153 } else if (DefUsesInMBB.size() == 1) { 154 // Insert the copy immediately after the def/use. 155 InsertPoint = *DefUsesInMBB.begin(); 156 ++InsertPoint; 157 } else { 158 // Insert the copy immediately after the last def/use. 159 InsertPoint = MBB.end(); 160 while (!DefUsesInMBB.count(&*--InsertPoint)) {} 161 ++InsertPoint; 162 } 163 164 // Make sure the copy goes after any phi nodes however. 165 return SkipPHIsAndLabels(MBB, InsertPoint); 166} 167 168/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 169/// under the assuption that it needs to be lowered in a way that supports 170/// atomic execution of PHIs. This lowering method is always correct all of the 171/// time. 172/// 173void llvm::PHIElimination::LowerAtomicPHINode( 174 MachineBasicBlock &MBB, 175 MachineBasicBlock::iterator AfterPHIsIt) { 176 ++NumAtomic; 177 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 178 MachineInstr *MPhi = MBB.remove(MBB.begin()); 179 180 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 181 unsigned DestReg = MPhi->getOperand(0).getReg(); 182 bool isDead = MPhi->getOperand(0).isDead(); 183 184 // Create a new register for the incoming PHI arguments. 185 MachineFunction &MF = *MBB.getParent(); 186 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 187 unsigned IncomingReg = 0; 188 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 189 190 // Insert a register to register copy at the top of the current block (but 191 // after any remaining phi nodes) which copies the new incoming register 192 // into the phi node destination. 193 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 194 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 195 // If all sources of a PHI node are implicit_def, just emit an 196 // implicit_def instead of a copy. 197 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 198 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 199 else { 200 // Can we reuse an earlier PHI node? This only happens for critical edges, 201 // typically those created by tail duplication. 202 unsigned &entry = LoweredPHIs[MPhi]; 203 if (entry) { 204 // An identical PHI node was already lowered. Reuse the incoming register. 205 IncomingReg = entry; 206 reusedIncoming = true; 207 ++NumReused; 208 DEBUG(dbgs() << "Reusing %reg" << IncomingReg << " for " << *MPhi); 209 } else { 210 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 211 } 212 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC, 213 MPhi->getDebugLoc()); 214 } 215 216 // Update live variable information if there is any. 217 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 218 if (LV) { 219 MachineInstr *PHICopy = prior(AfterPHIsIt); 220 221 if (IncomingReg) { 222 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 223 224 // Increment use count of the newly created virtual register. 225 VI.NumUses++; 226 LV->setPHIJoin(IncomingReg); 227 228 // When we are reusing the incoming register, it may already have been 229 // killed in this block. The old kill will also have been inserted at 230 // AfterPHIsIt, so it appears before the current PHICopy. 231 if (reusedIncoming) 232 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 233 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 234 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 235 DEBUG(MBB.dump()); 236 } 237 238 // Add information to LiveVariables to know that the incoming value is 239 // killed. Note that because the value is defined in several places (once 240 // each for each incoming block), the "def" block and instruction fields 241 // for the VarInfo is not filled in. 242 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 243 } 244 245 // Since we are going to be deleting the PHI node, if it is the last use of 246 // any registers, or if the value itself is dead, we need to move this 247 // information over to the new copy we just inserted. 248 LV->removeVirtualRegistersKilled(MPhi); 249 250 // If the result is dead, update LV. 251 if (isDead) { 252 LV->addVirtualRegisterDead(DestReg, PHICopy); 253 LV->removeVirtualRegisterDead(DestReg, MPhi); 254 } 255 } 256 257 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 258 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 259 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 260 MPhi->getOperand(i).getReg())]; 261 262 // Now loop over all of the incoming arguments, changing them to copy into the 263 // IncomingReg register in the corresponding predecessor basic block. 264 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 265 for (int i = NumSrcs - 1; i >= 0; --i) { 266 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 267 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 268 "Machine PHI Operands must all be virtual registers!"); 269 270 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 271 // path the PHI. 272 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 273 274 // If source is defined by an implicit def, there is no need to insert a 275 // copy. 276 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 277 if (DefMI->isImplicitDef()) { 278 ImpDefs.insert(DefMI); 279 continue; 280 } 281 282 // Check to make sure we haven't already emitted the copy for this block. 283 // This can happen because PHI nodes may have multiple entries for the same 284 // basic block. 285 if (!MBBsInsertedInto.insert(&opBlock)) 286 continue; // If the copy has already been emitted, we're done. 287 288 // Find a safe location to insert the copy, this may be the first terminator 289 // in the block (or end()). 290 MachineBasicBlock::iterator InsertPos = 291 FindCopyInsertPoint(opBlock, MBB, SrcReg); 292 293 // Insert the copy. 294 if (!reusedIncoming && IncomingReg) 295 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC, 296 MPhi->getDebugLoc()); 297 298 // Now update live variable information if we have it. Otherwise we're done 299 if (!LV) continue; 300 301 // We want to be able to insert a kill of the register if this PHI (aka, the 302 // copy we just inserted) is the last use of the source value. Live 303 // variable analysis conservatively handles this by saying that the value is 304 // live until the end of the block the PHI entry lives in. If the value 305 // really is dead at the PHI copy, there will be no successor blocks which 306 // have the value live-in. 307 308 // Also check to see if this register is in use by another PHI node which 309 // has not yet been eliminated. If so, it will be killed at an appropriate 310 // point later. 311 312 // Is it used by any PHI instructions in this block? 313 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 314 315 // Okay, if we now know that the value is not live out of the block, we can 316 // add a kill marker in this block saying that it kills the incoming value! 317 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 318 // In our final twist, we have to decide which instruction kills the 319 // register. In most cases this is the copy, however, the first 320 // terminator instruction at the end of the block may also use the value. 321 // In this case, we should mark *it* as being the killing block, not the 322 // copy. 323 MachineBasicBlock::iterator KillInst; 324 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 325 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 326 KillInst = Term; 327 328 // Check that no other terminators use values. 329#ifndef NDEBUG 330 for (MachineBasicBlock::iterator TI = llvm::next(Term); 331 TI != opBlock.end(); ++TI) { 332 assert(!TI->readsRegister(SrcReg) && 333 "Terminator instructions cannot use virtual registers unless" 334 "they are the first terminator in a block!"); 335 } 336#endif 337 } else if (reusedIncoming || !IncomingReg) { 338 // We may have to rewind a bit if we didn't insert a copy this time. 339 KillInst = Term; 340 while (KillInst != opBlock.begin()) 341 if ((--KillInst)->readsRegister(SrcReg)) 342 break; 343 } else { 344 // We just inserted this copy. 345 KillInst = prior(InsertPos); 346 } 347 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 348 349 // Finally, mark it killed. 350 LV->addVirtualRegisterKilled(SrcReg, KillInst); 351 352 // This vreg no longer lives all of the way through opBlock. 353 unsigned opBlockNum = opBlock.getNumber(); 354 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 355 } 356 } 357 358 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 359 if (reusedIncoming || !IncomingReg) 360 MF.DeleteMachineInstr(MPhi); 361} 362 363/// analyzePHINodes - Gather information about the PHI nodes in here. In 364/// particular, we want to map the number of uses of a virtual register which is 365/// used in a PHI node. We map that to the BB the vreg is coming from. This is 366/// used later to determine when the vreg is killed in the BB. 367/// 368void llvm::PHIElimination::analyzePHINodes(const MachineFunction& MF) { 369 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 370 I != E; ++I) 371 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 372 BBI != BBE && BBI->isPHI(); ++BBI) 373 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 374 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 375 BBI->getOperand(i).getReg())]; 376} 377 378bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF, 379 MachineBasicBlock &MBB, 380 LiveVariables &LV) { 381 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 382 return false; // Quick exit for basic blocks without PHIs. 383 384 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); 385 BBI != BBE && BBI->isPHI(); ++BBI) { 386 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 387 unsigned Reg = BBI->getOperand(i).getReg(); 388 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 389 // We break edges when registers are live out from the predecessor block 390 // (not considering PHI nodes). If the register is live in to this block 391 // anyway, we would gain nothing from splitting. 392 if (!LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) 393 PreMBB->SplitCriticalEdge(&MBB, this); 394 } 395 } 396 return true; 397} 398