RegAllocPBQP.cpp revision 241d0209a765c97c684b120527e185f17723f650 
1//===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a Partitioned Boolean Quadratic Programming (PBQP) based
11// register allocator for LLVM. This allocator works by constructing a PBQP
12// problem representing the register allocation problem under consideration,
13// solving this using a PBQP solver, and mapping the solution back to a
14// register assignment. If any variables are selected for spilling then spill
15// code is inserted and the process repeated.
16//
17// The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned
18// for register allocation. For more information on PBQP for register
19// allocation, see the following papers:
20//
21//   (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with
22//   PBQP. In Proceedings of the 7th Joint Modular Languages Conference
23//   (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361.
24//
25//   (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular
26//   architectures. In Proceedings of the Joint Conference on Languages,
27//   Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York,
28//   NY, USA, 139-148.
29//
30//===----------------------------------------------------------------------===//
31
32#define DEBUG_TYPE "regalloc"
33
34#include "Spiller.h"
35#include "VirtRegMap.h"
36#include "RegisterCoalescer.h"
37#include "llvm/Module.h"
38#include "llvm/Analysis/AliasAnalysis.h"
39#include "llvm/CodeGen/CalcSpillWeights.h"
40#include "llvm/CodeGen/LiveIntervalAnalysis.h"
41#include "llvm/CodeGen/LiveRangeEdit.h"
42#include "llvm/CodeGen/LiveStackAnalysis.h"
43#include "llvm/CodeGen/RegAllocPBQP.h"
44#include "llvm/CodeGen/MachineDominators.h"
45#include "llvm/CodeGen/MachineFunctionPass.h"
46#include "llvm/CodeGen/MachineLoopInfo.h"
47#include "llvm/CodeGen/MachineRegisterInfo.h"
48#include "llvm/CodeGen/PBQP/HeuristicSolver.h"
49#include "llvm/CodeGen/PBQP/Graph.h"
50#include "llvm/CodeGen/PBQP/Heuristics/Briggs.h"
51#include "llvm/CodeGen/RegAllocRegistry.h"
52#include "llvm/Support/Debug.h"
53#include "llvm/Support/raw_ostream.h"
54#include "llvm/Target/TargetInstrInfo.h"
55#include "llvm/Target/TargetMachine.h"
56#include <limits>
57#include <memory>
58#include <set>
59#include <sstream>
60#include <vector>
61
62using namespace llvm;
63
64static RegisterRegAlloc
65registerPBQPRepAlloc("pbqp", "PBQP register allocator",
66                       createDefaultPBQPRegisterAllocator);
67
68static cl::opt<bool>
69pbqpCoalescing("pbqp-coalescing",
70                cl::desc("Attempt coalescing during PBQP register allocation."),
71                cl::init(false), cl::Hidden);
72
73#ifndef NDEBUG
74static cl::opt<bool>
75pbqpDumpGraphs("pbqp-dump-graphs",
76               cl::desc("Dump graphs for each function/round in the compilation unit."),
77               cl::init(false), cl::Hidden);
78#endif
79
80namespace {
81
82///
83/// PBQP based allocators solve the register allocation problem by mapping
84/// register allocation problems to Partitioned Boolean Quadratic
85/// Programming problems.
86class RegAllocPBQP : public MachineFunctionPass {
87public:
88
89  static char ID;
90
91  /// Construct a PBQP register allocator.
92  RegAllocPBQP(std::auto_ptr<PBQPBuilder> b, char *cPassID=0)
93      : MachineFunctionPass(ID), builder(b), customPassID(cPassID) {
94    initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
95    initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
96    initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
97    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
98    initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
99    initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
100  }
101
102  /// Return the pass name.
103  virtual const char* getPassName() const {
104    return "PBQP Register Allocator";
105  }
106
107  /// PBQP analysis usage.
108  virtual void getAnalysisUsage(AnalysisUsage &au) const;
109
110  /// Perform register allocation
111  virtual bool runOnMachineFunction(MachineFunction &MF);
112
113private:
114
115  typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
116  typedef std::vector<const LiveInterval*> Node2LIMap;
117  typedef std::vector<unsigned> AllowedSet;
118  typedef std::vector<AllowedSet> AllowedSetMap;
119  typedef std::pair<unsigned, unsigned> RegPair;
120  typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
121  typedef std::vector<PBQP::Graph::NodeItr> NodeVector;
122  typedef std::set<unsigned> RegSet;
123
124
125  std::auto_ptr<PBQPBuilder> builder;
126
127  char *customPassID;
128
129  MachineFunction *mf;
130  const TargetMachine *tm;
131  const TargetRegisterInfo *tri;
132  const TargetInstrInfo *tii;
133  const MachineLoopInfo *loopInfo;
134  MachineRegisterInfo *mri;
135
136  std::auto_ptr<Spiller> spiller;
137  LiveIntervals *lis;
138  LiveStacks *lss;
139  VirtRegMap *vrm;
140
141  RegSet vregsToAlloc, emptyIntervalVRegs;
142
143  /// \brief Finds the initial set of vreg intervals to allocate.
144  void findVRegIntervalsToAlloc();
145
146  /// \brief Given a solved PBQP problem maps this solution back to a register
147  /// assignment.
148  bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
149                         const PBQP::Solution &solution);
150
151  /// \brief Postprocessing before final spilling. Sets basic block "live in"
152  /// variables.
153  void finalizeAlloc() const;
154
155};
156
157char RegAllocPBQP::ID = 0;
158
159} // End anonymous namespace.
160
161unsigned PBQPRAProblem::getVRegForNode(PBQP::Graph::ConstNodeItr node) const {
162  Node2VReg::const_iterator vregItr = node2VReg.find(node);
163  assert(vregItr != node2VReg.end() && "No vreg for node.");
164  return vregItr->second;
165}
166
167PBQP::Graph::NodeItr PBQPRAProblem::getNodeForVReg(unsigned vreg) const {
168  VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg);
169  assert(nodeItr != vreg2Node.end() && "No node for vreg.");
170  return nodeItr->second;
171
172}
173
174const PBQPRAProblem::AllowedSet&
175  PBQPRAProblem::getAllowedSet(unsigned vreg) const {
176  AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg);
177  assert(allowedSetItr != allowedSets.end() && "No pregs for vreg.");
178  const AllowedSet &allowedSet = allowedSetItr->second;
179  return allowedSet;
180}
181
182unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const {
183  assert(isPRegOption(vreg, option) && "Not a preg option.");
184
185  const AllowedSet& allowedSet = getAllowedSet(vreg);
186  assert(option <= allowedSet.size() && "Option outside allowed set.");
187  return allowedSet[option - 1];
188}
189
190std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
191                                                const LiveIntervals *lis,
192                                                const MachineLoopInfo *loopInfo,
193                                                const RegSet &vregs) {
194
195  typedef std::vector<const LiveInterval*> LIVector;
196  LiveIntervals *LIS = const_cast<LiveIntervals*>(lis);
197  MachineRegisterInfo *mri = &mf->getRegInfo();
198  const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo();
199
200  std::auto_ptr<PBQPRAProblem> p(new PBQPRAProblem());
201  PBQP::Graph &g = p->getGraph();
202  RegSet pregs;
203
204  // Collect the set of preg intervals, record that they're used in the MF.
205  for (unsigned Reg = 1, e = tri->getNumRegs(); Reg != e; ++Reg) {
206    if (mri->def_empty(Reg))
207      continue;
208    pregs.insert(Reg);
209    mri->setPhysRegUsed(Reg);
210  }
211
212  BitVector reservedRegs = tri->getReservedRegs(*mf);
213
214  // Iterate over vregs.
215  for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end();
216       vregItr != vregEnd; ++vregItr) {
217    unsigned vreg = *vregItr;
218    const TargetRegisterClass *trc = mri->getRegClass(vreg);
219    LiveInterval *vregLI = &LIS->getInterval(vreg);
220
221    // Record any overlaps with regmask operands.
222    BitVector regMaskOverlaps(tri->getNumRegs());
223    LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps);
224
225    // Compute an initial allowed set for the current vreg.
226    typedef std::vector<unsigned> VRAllowed;
227    VRAllowed vrAllowed;
228    ArrayRef<uint16_t> rawOrder = trc->getRawAllocationOrder(*mf);
229    for (unsigned i = 0; i != rawOrder.size(); ++i) {
230      unsigned preg = rawOrder[i];
231      if (reservedRegs.test(preg))
232        continue;
233
234      // vregLI crosses a regmask operand that clobbers preg.
235      if (!regMaskOverlaps.empty() && !regMaskOverlaps.test(preg))
236        continue;
237
238      // vregLI overlaps fixed regunit interference.
239      bool Interference = false;
240      for (MCRegUnitIterator Units(preg, tri); Units.isValid(); ++Units) {
241        if (vregLI->overlaps(LIS->getRegUnit(*Units))) {
242          Interference = true;
243          break;
244        }
245      }
246      if (Interference)
247        continue;
248
249      // preg is usable for this virtual register.
250      vrAllowed.push_back(preg);
251    }
252
253    // Construct the node.
254    PBQP::Graph::NodeItr node =
255      g.addNode(PBQP::Vector(vrAllowed.size() + 1, 0));
256
257    // Record the mapping and allowed set in the problem.
258    p->recordVReg(vreg, node, vrAllowed.begin(), vrAllowed.end());
259
260    PBQP::PBQPNum spillCost = (vregLI->weight != 0.0) ?
261        vregLI->weight : std::numeric_limits<PBQP::PBQPNum>::min();
262
263    addSpillCosts(g.getNodeCosts(node), spillCost);
264  }
265
266  for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end();
267         vr1Itr != vrEnd; ++vr1Itr) {
268    unsigned vr1 = *vr1Itr;
269    const LiveInterval &l1 = lis->getInterval(vr1);
270    const PBQPRAProblem::AllowedSet &vr1Allowed = p->getAllowedSet(vr1);
271
272    for (RegSet::const_iterator vr2Itr = llvm::next(vr1Itr);
273         vr2Itr != vrEnd; ++vr2Itr) {
274      unsigned vr2 = *vr2Itr;
275      const LiveInterval &l2 = lis->getInterval(vr2);
276      const PBQPRAProblem::AllowedSet &vr2Allowed = p->getAllowedSet(vr2);
277
278      assert(!l2.empty() && "Empty interval in vreg set?");
279      if (l1.overlaps(l2)) {
280        PBQP::Graph::EdgeItr edge =
281          g.addEdge(p->getNodeForVReg(vr1), p->getNodeForVReg(vr2),
282                    PBQP::Matrix(vr1Allowed.size()+1, vr2Allowed.size()+1, 0));
283
284        addInterferenceCosts(g.getEdgeCosts(edge), vr1Allowed, vr2Allowed, tri);
285      }
286    }
287  }
288
289  return p;
290}
291
292void PBQPBuilder::addSpillCosts(PBQP::Vector &costVec,
293                                PBQP::PBQPNum spillCost) {
294  costVec[0] = spillCost;
295}
296
297void PBQPBuilder::addInterferenceCosts(
298                                    PBQP::Matrix &costMat,
299                                    const PBQPRAProblem::AllowedSet &vr1Allowed,
300                                    const PBQPRAProblem::AllowedSet &vr2Allowed,
301                                    const TargetRegisterInfo *tri) {
302  assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch.");
303  assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch.");
304
305  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
306    unsigned preg1 = vr1Allowed[i];
307
308    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
309      unsigned preg2 = vr2Allowed[j];
310
311      if (tri->regsOverlap(preg1, preg2)) {
312        costMat[i + 1][j + 1] = std::numeric_limits<PBQP::PBQPNum>::infinity();
313      }
314    }
315  }
316}
317
318std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
319                                                MachineFunction *mf,
320                                                const LiveIntervals *lis,
321                                                const MachineLoopInfo *loopInfo,
322                                                const RegSet &vregs) {
323
324  std::auto_ptr<PBQPRAProblem> p = PBQPBuilder::build(mf, lis, loopInfo, vregs);
325  PBQP::Graph &g = p->getGraph();
326
327  const TargetMachine &tm = mf->getTarget();
328  CoalescerPair cp(*tm.getRegisterInfo());
329
330  // Scan the machine function and add a coalescing cost whenever CoalescerPair
331  // gives the Ok.
332  for (MachineFunction::const_iterator mbbItr = mf->begin(),
333                                       mbbEnd = mf->end();
334       mbbItr != mbbEnd; ++mbbItr) {
335    const MachineBasicBlock *mbb = &*mbbItr;
336
337    for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
338                                           miEnd = mbb->end();
339         miItr != miEnd; ++miItr) {
340      const MachineInstr *mi = &*miItr;
341
342      if (!cp.setRegisters(mi)) {
343        continue; // Not coalescable.
344      }
345
346      if (cp.getSrcReg() == cp.getDstReg()) {
347        continue; // Already coalesced.
348      }
349
350      unsigned dst = cp.getDstReg(),
351               src = cp.getSrcReg();
352
353      const float copyFactor = 0.5; // Cost of copy relative to load. Current
354      // value plucked randomly out of the air.
355
356      PBQP::PBQPNum cBenefit =
357        copyFactor * LiveIntervals::getSpillWeight(false, true,
358                                                   loopInfo->getLoopDepth(mbb));
359
360      if (cp.isPhys()) {
361        if (!lis->isAllocatable(dst)) {
362          continue;
363        }
364
365        const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src);
366        unsigned pregOpt = 0;
367        while (pregOpt < allowed.size() && allowed[pregOpt] != dst) {
368          ++pregOpt;
369        }
370        if (pregOpt < allowed.size()) {
371          ++pregOpt; // +1 to account for spill option.
372          PBQP::Graph::NodeItr node = p->getNodeForVReg(src);
373          addPhysRegCoalesce(g.getNodeCosts(node), pregOpt, cBenefit);
374        }
375      } else {
376        const PBQPRAProblem::AllowedSet *allowed1 = &p->getAllowedSet(dst);
377        const PBQPRAProblem::AllowedSet *allowed2 = &p->getAllowedSet(src);
378        PBQP::Graph::NodeItr node1 = p->getNodeForVReg(dst);
379        PBQP::Graph::NodeItr node2 = p->getNodeForVReg(src);
380        PBQP::Graph::EdgeItr edge = g.findEdge(node1, node2);
381        if (edge == g.edgesEnd()) {
382          edge = g.addEdge(node1, node2, PBQP::Matrix(allowed1->size() + 1,
383                                                      allowed2->size() + 1,
384                                                      0));
385        } else {
386          if (g.getEdgeNode1(edge) == node2) {
387            std::swap(node1, node2);
388            std::swap(allowed1, allowed2);
389          }
390        }
391
392        addVirtRegCoalesce(g.getEdgeCosts(edge), *allowed1, *allowed2,
393                           cBenefit);
394      }
395    }
396  }
397
398  return p;
399}
400
401void PBQPBuilderWithCoalescing::addPhysRegCoalesce(PBQP::Vector &costVec,
402                                                   unsigned pregOption,
403                                                   PBQP::PBQPNum benefit) {
404  costVec[pregOption] += -benefit;
405}
406
407void PBQPBuilderWithCoalescing::addVirtRegCoalesce(
408                                    PBQP::Matrix &costMat,
409                                    const PBQPRAProblem::AllowedSet &vr1Allowed,
410                                    const PBQPRAProblem::AllowedSet &vr2Allowed,
411                                    PBQP::PBQPNum benefit) {
412
413  assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch.");
414  assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch.");
415
416  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
417    unsigned preg1 = vr1Allowed[i];
418    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
419      unsigned preg2 = vr2Allowed[j];
420
421      if (preg1 == preg2) {
422        costMat[i + 1][j + 1] += -benefit;
423      }
424    }
425  }
426}
427
428
429void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
430  au.setPreservesCFG();
431  au.addRequired<AliasAnalysis>();
432  au.addPreserved<AliasAnalysis>();
433  au.addRequired<SlotIndexes>();
434  au.addPreserved<SlotIndexes>();
435  au.addRequired<LiveIntervals>();
436  //au.addRequiredID(SplitCriticalEdgesID);
437  if (customPassID)
438    au.addRequiredID(*customPassID);
439  au.addRequired<CalculateSpillWeights>();
440  au.addRequired<LiveStacks>();
441  au.addPreserved<LiveStacks>();
442  au.addRequired<MachineDominatorTree>();
443  au.addPreserved<MachineDominatorTree>();
444  au.addRequired<MachineLoopInfo>();
445  au.addPreserved<MachineLoopInfo>();
446  au.addRequired<VirtRegMap>();
447  MachineFunctionPass::getAnalysisUsage(au);
448}
449
450void RegAllocPBQP::findVRegIntervalsToAlloc() {
451
452  // Iterate over all live ranges.
453  for (unsigned i = 0, e = mri->getNumVirtRegs(); i != e; ++i) {
454    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
455    if (mri->reg_nodbg_empty(Reg))
456      continue;
457    LiveInterval *li = &lis->getInterval(Reg);
458
459    // If this live interval is non-empty we will use pbqp to allocate it.
460    // Empty intervals we allocate in a simple post-processing stage in
461    // finalizeAlloc.
462    if (!li->empty()) {
463      vregsToAlloc.insert(li->reg);
464    } else {
465      emptyIntervalVRegs.insert(li->reg);
466    }
467  }
468}
469
470bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
471                                     const PBQP::Solution &solution) {
472  // Set to true if we have any spills
473  bool anotherRoundNeeded = false;
474
475  // Clear the existing allocation.
476  vrm->clearAllVirt();
477
478  const PBQP::Graph &g = problem.getGraph();
479  // Iterate over the nodes mapping the PBQP solution to a register
480  // assignment.
481  for (PBQP::Graph::ConstNodeItr node = g.nodesBegin(),
482                                 nodeEnd = g.nodesEnd();
483       node != nodeEnd; ++node) {
484    unsigned vreg = problem.getVRegForNode(node);
485    unsigned alloc = solution.getSelection(node);
486
487    if (problem.isPRegOption(vreg, alloc)) {
488      unsigned preg = problem.getPRegForOption(vreg, alloc);
489      DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> "
490            << tri->getName(preg) << "\n");
491      assert(preg != 0 && "Invalid preg selected.");
492      vrm->assignVirt2Phys(vreg, preg);
493    } else if (problem.isSpillOption(vreg, alloc)) {
494      vregsToAlloc.erase(vreg);
495      SmallVector<LiveInterval*, 8> newSpills;
496      LiveRangeEdit LRE(&lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
497      spiller->spill(LRE);
498
499      DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> SPILLED (Cost: "
500                   << LRE.getParent().weight << ", New vregs: ");
501
502      // Copy any newly inserted live intervals into the list of regs to
503      // allocate.
504      for (LiveRangeEdit::iterator itr = LRE.begin(), end = LRE.end();
505           itr != end; ++itr) {
506        assert(!(*itr)->empty() && "Empty spill range.");
507        DEBUG(dbgs() << PrintReg((*itr)->reg, tri) << " ");
508        vregsToAlloc.insert((*itr)->reg);
509      }
510
511      DEBUG(dbgs() << ")\n");
512
513      // We need another round if spill intervals were added.
514      anotherRoundNeeded |= !LRE.empty();
515    } else {
516      llvm_unreachable("Unknown allocation option.");
517    }
518  }
519
520  return !anotherRoundNeeded;
521}
522
523
524void RegAllocPBQP::finalizeAlloc() const {
525  // First allocate registers for the empty intervals.
526  for (RegSet::const_iterator
527         itr = emptyIntervalVRegs.begin(), end = emptyIntervalVRegs.end();
528         itr != end; ++itr) {
529    LiveInterval *li = &lis->getInterval(*itr);
530
531    unsigned physReg = vrm->getRegAllocPref(li->reg);
532
533    if (physReg == 0) {
534      const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
535      physReg = liRC->getRawAllocationOrder(*mf).front();
536    }
537
538    vrm->assignVirt2Phys(li->reg, physReg);
539  }
540}
541
542bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
543
544  mf = &MF;
545  tm = &mf->getTarget();
546  tri = tm->getRegisterInfo();
547  tii = tm->getInstrInfo();
548  mri = &mf->getRegInfo();
549
550  lis = &getAnalysis<LiveIntervals>();
551  lss = &getAnalysis<LiveStacks>();
552  loopInfo = &getAnalysis<MachineLoopInfo>();
553
554  vrm = &getAnalysis<VirtRegMap>();
555  spiller.reset(createInlineSpiller(*this, MF, *vrm));
556
557  mri->freezeReservedRegs(MF);
558
559  DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getFunction()->getName() << "\n");
560
561  // Allocator main loop:
562  //
563  // * Map current regalloc problem to a PBQP problem
564  // * Solve the PBQP problem
565  // * Map the solution back to a register allocation
566  // * Spill if necessary
567  //
568  // This process is continued till no more spills are generated.
569
570  // Find the vreg intervals in need of allocation.
571  findVRegIntervalsToAlloc();
572
573  const Function* func = mf->getFunction();
574  std::string fqn =
575    func->getParent()->getModuleIdentifier() + "." +
576    func->getName().str();
577  (void)fqn;
578
579  // If there are non-empty intervals allocate them using pbqp.
580  if (!vregsToAlloc.empty()) {
581
582    bool pbqpAllocComplete = false;
583    unsigned round = 0;
584
585    while (!pbqpAllocComplete) {
586      DEBUG(dbgs() << "  PBQP Regalloc round " << round << ":\n");
587
588      std::auto_ptr<PBQPRAProblem> problem =
589        builder->build(mf, lis, loopInfo, vregsToAlloc);
590
591#ifndef NDEBUG
592      if (pbqpDumpGraphs) {
593        std::ostringstream rs;
594        rs << round;
595        std::string graphFileName(fqn + "." + rs.str() + ".pbqpgraph");
596        std::string tmp;
597        raw_fd_ostream os(graphFileName.c_str(), tmp);
598        DEBUG(dbgs() << "Dumping graph for round " << round << " to \""
599              << graphFileName << "\"\n");
600        problem->getGraph().dump(os);
601      }
602#endif
603
604      PBQP::Solution solution =
605        PBQP::HeuristicSolver<PBQP::Heuristics::Briggs>::solve(
606          problem->getGraph());
607
608      pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
609
610      ++round;
611    }
612  }
613
614  // Finalise allocation, allocate empty ranges.
615  finalizeAlloc();
616  vregsToAlloc.clear();
617  emptyIntervalVRegs.clear();
618
619  DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
620
621  return true;
622}
623
624FunctionPass* llvm::createPBQPRegisterAllocator(
625                                           std::auto_ptr<PBQPBuilder> builder,
626                                           char *customPassID) {
627  return new RegAllocPBQP(builder, customPassID);
628}
629
630FunctionPass* llvm::createDefaultPBQPRegisterAllocator() {
631  if (pbqpCoalescing) {
632    return createPBQPRegisterAllocator(
633             std::auto_ptr<PBQPBuilder>(new PBQPBuilderWithCoalescing()));
634  } // else
635  return createPBQPRegisterAllocator(
636           std::auto_ptr<PBQPBuilder>(new PBQPBuilder()));
637}
638
639#undef DEBUG_TYPE
640