RegAllocPBQP.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a Partitioned Boolean Quadratic Programming (PBQP) based
11// register allocator for LLVM. This allocator works by constructing a PBQP
12// problem representing the register allocation problem under consideration,
13// solving this using a PBQP solver, and mapping the solution back to a
14// register assignment. If any variables are selected for spilling then spill
15// code is inserted and the process repeated.
16//
17// The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned
18// for register allocation. For more information on PBQP for register
19// allocation, see the following papers:
20//
21//   (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with
22//   PBQP. In Proceedings of the 7th Joint Modular Languages Conference
23//   (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361.
24//
25//   (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular
26//   architectures. In Proceedings of the Joint Conference on Languages,
27//   Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York,
28//   NY, USA, 139-148.
29//
30//===----------------------------------------------------------------------===//
31
32#define DEBUG_TYPE "regalloc"
33
34#include "llvm/CodeGen/RegAllocPBQP.h"
35#include "RegisterCoalescer.h"
36#include "Spiller.h"
37#include "llvm/Analysis/AliasAnalysis.h"
38#include "llvm/CodeGen/CalcSpillWeights.h"
39#include "llvm/CodeGen/LiveIntervalAnalysis.h"
40#include "llvm/CodeGen/LiveRangeEdit.h"
41#include "llvm/CodeGen/LiveStackAnalysis.h"
42#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
43#include "llvm/CodeGen/MachineDominators.h"
44#include "llvm/CodeGen/MachineFunctionPass.h"
45#include "llvm/CodeGen/MachineLoopInfo.h"
46#include "llvm/CodeGen/MachineRegisterInfo.h"
47#include "llvm/CodeGen/RegAllocRegistry.h"
48#include "llvm/CodeGen/VirtRegMap.h"
49#include "llvm/IR/Module.h"
50#include "llvm/Support/Debug.h"
51#include "llvm/Support/raw_ostream.h"
52#include "llvm/Target/TargetInstrInfo.h"
53#include "llvm/Target/TargetMachine.h"
54#include <limits>
55#include <memory>
56#include <set>
57#include <sstream>
58#include <vector>
59
60using namespace llvm;
61
62static RegisterRegAlloc
63registerPBQPRepAlloc("pbqp", "PBQP register allocator",
64                       createDefaultPBQPRegisterAllocator);
65
66static cl::opt<bool>
67pbqpCoalescing("pbqp-coalescing",
68                cl::desc("Attempt coalescing during PBQP register allocation."),
69                cl::init(false), cl::Hidden);
70
71#ifndef NDEBUG
72static cl::opt<bool>
73pbqpDumpGraphs("pbqp-dump-graphs",
74               cl::desc("Dump graphs for each function/round in the compilation unit."),
75               cl::init(false), cl::Hidden);
76#endif
77
78namespace {
79
80///
81/// PBQP based allocators solve the register allocation problem by mapping
82/// register allocation problems to Partitioned Boolean Quadratic
83/// Programming problems.
84class RegAllocPBQP : public MachineFunctionPass {
85public:
86
87  static char ID;
88
89  /// Construct a PBQP register allocator.
90  RegAllocPBQP(std::unique_ptr<PBQPBuilder> &b, char *cPassID=0)
91      : MachineFunctionPass(ID), builder(b.release()), customPassID(cPassID) {
92    initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
93    initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
94    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
95    initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
96  }
97
98  /// Return the pass name.
99  const char* getPassName() const override {
100    return "PBQP Register Allocator";
101  }
102
103  /// PBQP analysis usage.
104  void getAnalysisUsage(AnalysisUsage &au) const override;
105
106  /// Perform register allocation
107  bool runOnMachineFunction(MachineFunction &MF) override;
108
109private:
110
111  typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
112  typedef std::vector<const LiveInterval*> Node2LIMap;
113  typedef std::vector<unsigned> AllowedSet;
114  typedef std::vector<AllowedSet> AllowedSetMap;
115  typedef std::pair<unsigned, unsigned> RegPair;
116  typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
117  typedef std::set<unsigned> RegSet;
118
119  std::unique_ptr<PBQPBuilder> builder;
120
121  char *customPassID;
122
123  MachineFunction *mf;
124  const TargetMachine *tm;
125  const TargetRegisterInfo *tri;
126  const TargetInstrInfo *tii;
127  MachineRegisterInfo *mri;
128  const MachineBlockFrequencyInfo *mbfi;
129
130  std::unique_ptr<Spiller> spiller;
131  LiveIntervals *lis;
132  LiveStacks *lss;
133  VirtRegMap *vrm;
134
135  RegSet vregsToAlloc, emptyIntervalVRegs;
136
137  /// \brief Finds the initial set of vreg intervals to allocate.
138  void findVRegIntervalsToAlloc();
139
140  /// \brief Given a solved PBQP problem maps this solution back to a register
141  /// assignment.
142  bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
143                         const PBQP::Solution &solution);
144
145  /// \brief Postprocessing before final spilling. Sets basic block "live in"
146  /// variables.
147  void finalizeAlloc() const;
148
149};
150
151char RegAllocPBQP::ID = 0;
152
153} // End anonymous namespace.
154
155unsigned PBQPRAProblem::getVRegForNode(PBQPRAGraph::NodeId node) const {
156  Node2VReg::const_iterator vregItr = node2VReg.find(node);
157  assert(vregItr != node2VReg.end() && "No vreg for node.");
158  return vregItr->second;
159}
160
161PBQPRAGraph::NodeId PBQPRAProblem::getNodeForVReg(unsigned vreg) const {
162  VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg);
163  assert(nodeItr != vreg2Node.end() && "No node for vreg.");
164  return nodeItr->second;
165
166}
167
168const PBQPRAProblem::AllowedSet&
169  PBQPRAProblem::getAllowedSet(unsigned vreg) const {
170  AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg);
171  assert(allowedSetItr != allowedSets.end() && "No pregs for vreg.");
172  const AllowedSet &allowedSet = allowedSetItr->second;
173  return allowedSet;
174}
175
176unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const {
177  assert(isPRegOption(vreg, option) && "Not a preg option.");
178
179  const AllowedSet& allowedSet = getAllowedSet(vreg);
180  assert(option <= allowedSet.size() && "Option outside allowed set.");
181  return allowedSet[option - 1];
182}
183
184PBQPRAProblem *PBQPBuilder::build(MachineFunction *mf, const LiveIntervals *lis,
185                                  const MachineBlockFrequencyInfo *mbfi,
186                                  const RegSet &vregs) {
187
188  LiveIntervals *LIS = const_cast<LiveIntervals*>(lis);
189  MachineRegisterInfo *mri = &mf->getRegInfo();
190  const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo();
191
192  std::unique_ptr<PBQPRAProblem> p(new PBQPRAProblem());
193  PBQPRAGraph &g = p->getGraph();
194  RegSet pregs;
195
196  // Collect the set of preg intervals, record that they're used in the MF.
197  for (unsigned Reg = 1, e = tri->getNumRegs(); Reg != e; ++Reg) {
198    if (mri->def_empty(Reg))
199      continue;
200    pregs.insert(Reg);
201    mri->setPhysRegUsed(Reg);
202  }
203
204  // Iterate over vregs.
205  for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end();
206       vregItr != vregEnd; ++vregItr) {
207    unsigned vreg = *vregItr;
208    const TargetRegisterClass *trc = mri->getRegClass(vreg);
209    LiveInterval *vregLI = &LIS->getInterval(vreg);
210
211    // Record any overlaps with regmask operands.
212    BitVector regMaskOverlaps;
213    LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps);
214
215    // Compute an initial allowed set for the current vreg.
216    typedef std::vector<unsigned> VRAllowed;
217    VRAllowed vrAllowed;
218    ArrayRef<uint16_t> rawOrder = trc->getRawAllocationOrder(*mf);
219    for (unsigned i = 0; i != rawOrder.size(); ++i) {
220      unsigned preg = rawOrder[i];
221      if (mri->isReserved(preg))
222        continue;
223
224      // vregLI crosses a regmask operand that clobbers preg.
225      if (!regMaskOverlaps.empty() && !regMaskOverlaps.test(preg))
226        continue;
227
228      // vregLI overlaps fixed regunit interference.
229      bool Interference = false;
230      for (MCRegUnitIterator Units(preg, tri); Units.isValid(); ++Units) {
231        if (vregLI->overlaps(LIS->getRegUnit(*Units))) {
232          Interference = true;
233          break;
234        }
235      }
236      if (Interference)
237        continue;
238
239      // preg is usable for this virtual register.
240      vrAllowed.push_back(preg);
241    }
242
243    PBQP::Vector nodeCosts(vrAllowed.size() + 1, 0);
244
245    PBQP::PBQPNum spillCost = (vregLI->weight != 0.0) ?
246        vregLI->weight : std::numeric_limits<PBQP::PBQPNum>::min();
247
248    addSpillCosts(nodeCosts, spillCost);
249
250    // Construct the node.
251    PBQPRAGraph::NodeId nId = g.addNode(std::move(nodeCosts));
252
253    // Record the mapping and allowed set in the problem.
254    p->recordVReg(vreg, nId, vrAllowed.begin(), vrAllowed.end());
255
256  }
257
258  for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end();
259         vr1Itr != vrEnd; ++vr1Itr) {
260    unsigned vr1 = *vr1Itr;
261    const LiveInterval &l1 = lis->getInterval(vr1);
262    const PBQPRAProblem::AllowedSet &vr1Allowed = p->getAllowedSet(vr1);
263
264    for (RegSet::const_iterator vr2Itr = std::next(vr1Itr); vr2Itr != vrEnd;
265         ++vr2Itr) {
266      unsigned vr2 = *vr2Itr;
267      const LiveInterval &l2 = lis->getInterval(vr2);
268      const PBQPRAProblem::AllowedSet &vr2Allowed = p->getAllowedSet(vr2);
269
270      assert(!l2.empty() && "Empty interval in vreg set?");
271      if (l1.overlaps(l2)) {
272        PBQP::Matrix edgeCosts(vr1Allowed.size()+1, vr2Allowed.size()+1, 0);
273        addInterferenceCosts(edgeCosts, vr1Allowed, vr2Allowed, tri);
274
275        g.addEdge(p->getNodeForVReg(vr1), p->getNodeForVReg(vr2),
276                  std::move(edgeCosts));
277      }
278    }
279  }
280
281  return p.release();
282}
283
284void PBQPBuilder::addSpillCosts(PBQP::Vector &costVec,
285                                PBQP::PBQPNum spillCost) {
286  costVec[0] = spillCost;
287}
288
289void PBQPBuilder::addInterferenceCosts(
290                                    PBQP::Matrix &costMat,
291                                    const PBQPRAProblem::AllowedSet &vr1Allowed,
292                                    const PBQPRAProblem::AllowedSet &vr2Allowed,
293                                    const TargetRegisterInfo *tri) {
294  assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch.");
295  assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch.");
296
297  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
298    unsigned preg1 = vr1Allowed[i];
299
300    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
301      unsigned preg2 = vr2Allowed[j];
302
303      if (tri->regsOverlap(preg1, preg2)) {
304        costMat[i + 1][j + 1] = std::numeric_limits<PBQP::PBQPNum>::infinity();
305      }
306    }
307  }
308}
309
310PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
311                                                const LiveIntervals *lis,
312                                                const MachineBlockFrequencyInfo *mbfi,
313                                                const RegSet &vregs) {
314
315  std::unique_ptr<PBQPRAProblem> p(PBQPBuilder::build(mf, lis, mbfi, vregs));
316  PBQPRAGraph &g = p->getGraph();
317
318  const TargetMachine &tm = mf->getTarget();
319  CoalescerPair cp(*tm.getRegisterInfo());
320
321  // Scan the machine function and add a coalescing cost whenever CoalescerPair
322  // gives the Ok.
323  for (MachineFunction::const_iterator mbbItr = mf->begin(),
324                                       mbbEnd = mf->end();
325       mbbItr != mbbEnd; ++mbbItr) {
326    const MachineBasicBlock *mbb = &*mbbItr;
327
328    for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
329                                           miEnd = mbb->end();
330         miItr != miEnd; ++miItr) {
331      const MachineInstr *mi = &*miItr;
332
333      if (!cp.setRegisters(mi)) {
334        continue; // Not coalescable.
335      }
336
337      if (cp.getSrcReg() == cp.getDstReg()) {
338        continue; // Already coalesced.
339      }
340
341      unsigned dst = cp.getDstReg(),
342               src = cp.getSrcReg();
343
344      const float copyFactor = 0.5; // Cost of copy relative to load. Current
345      // value plucked randomly out of the air.
346
347      PBQP::PBQPNum cBenefit =
348        copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, mi);
349
350      if (cp.isPhys()) {
351        if (!mf->getRegInfo().isAllocatable(dst)) {
352          continue;
353        }
354
355        const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src);
356        unsigned pregOpt = 0;
357        while (pregOpt < allowed.size() && allowed[pregOpt] != dst) {
358          ++pregOpt;
359        }
360        if (pregOpt < allowed.size()) {
361          ++pregOpt; // +1 to account for spill option.
362          PBQPRAGraph::NodeId node = p->getNodeForVReg(src);
363          llvm::dbgs() << "Reading node costs for node " << node << "\n";
364          llvm::dbgs() << "Source node: " << &g.getNodeCosts(node) << "\n";
365          PBQP::Vector newCosts(g.getNodeCosts(node));
366          addPhysRegCoalesce(newCosts, pregOpt, cBenefit);
367          g.setNodeCosts(node, newCosts);
368        }
369      } else {
370        const PBQPRAProblem::AllowedSet *allowed1 = &p->getAllowedSet(dst);
371        const PBQPRAProblem::AllowedSet *allowed2 = &p->getAllowedSet(src);
372        PBQPRAGraph::NodeId node1 = p->getNodeForVReg(dst);
373        PBQPRAGraph::NodeId node2 = p->getNodeForVReg(src);
374        PBQPRAGraph::EdgeId edge = g.findEdge(node1, node2);
375        if (edge == g.invalidEdgeId()) {
376          PBQP::Matrix costs(allowed1->size() + 1, allowed2->size() + 1, 0);
377          addVirtRegCoalesce(costs, *allowed1, *allowed2, cBenefit);
378          g.addEdge(node1, node2, costs);
379        } else {
380          if (g.getEdgeNode1Id(edge) == node2) {
381            std::swap(node1, node2);
382            std::swap(allowed1, allowed2);
383          }
384          PBQP::Matrix costs(g.getEdgeCosts(edge));
385          addVirtRegCoalesce(costs, *allowed1, *allowed2, cBenefit);
386          g.setEdgeCosts(edge, costs);
387        }
388      }
389    }
390  }
391
392  return p.release();
393}
394
395void PBQPBuilderWithCoalescing::addPhysRegCoalesce(PBQP::Vector &costVec,
396                                                   unsigned pregOption,
397                                                   PBQP::PBQPNum benefit) {
398  costVec[pregOption] += -benefit;
399}
400
401void PBQPBuilderWithCoalescing::addVirtRegCoalesce(
402                                    PBQP::Matrix &costMat,
403                                    const PBQPRAProblem::AllowedSet &vr1Allowed,
404                                    const PBQPRAProblem::AllowedSet &vr2Allowed,
405                                    PBQP::PBQPNum benefit) {
406
407  assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch.");
408  assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch.");
409
410  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
411    unsigned preg1 = vr1Allowed[i];
412    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
413      unsigned preg2 = vr2Allowed[j];
414
415      if (preg1 == preg2) {
416        costMat[i + 1][j + 1] += -benefit;
417      }
418    }
419  }
420}
421
422
423void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
424  au.setPreservesCFG();
425  au.addRequired<AliasAnalysis>();
426  au.addPreserved<AliasAnalysis>();
427  au.addRequired<SlotIndexes>();
428  au.addPreserved<SlotIndexes>();
429  au.addRequired<LiveIntervals>();
430  au.addPreserved<LiveIntervals>();
431  //au.addRequiredID(SplitCriticalEdgesID);
432  if (customPassID)
433    au.addRequiredID(*customPassID);
434  au.addRequired<LiveStacks>();
435  au.addPreserved<LiveStacks>();
436  au.addRequired<MachineBlockFrequencyInfo>();
437  au.addPreserved<MachineBlockFrequencyInfo>();
438  au.addRequired<MachineLoopInfo>();
439  au.addPreserved<MachineLoopInfo>();
440  au.addRequired<MachineDominatorTree>();
441  au.addPreserved<MachineDominatorTree>();
442  au.addRequired<VirtRegMap>();
443  au.addPreserved<VirtRegMap>();
444  MachineFunctionPass::getAnalysisUsage(au);
445}
446
447void RegAllocPBQP::findVRegIntervalsToAlloc() {
448
449  // Iterate over all live ranges.
450  for (unsigned i = 0, e = mri->getNumVirtRegs(); i != e; ++i) {
451    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
452    if (mri->reg_nodbg_empty(Reg))
453      continue;
454    LiveInterval *li = &lis->getInterval(Reg);
455
456    // If this live interval is non-empty we will use pbqp to allocate it.
457    // Empty intervals we allocate in a simple post-processing stage in
458    // finalizeAlloc.
459    if (!li->empty()) {
460      vregsToAlloc.insert(li->reg);
461    } else {
462      emptyIntervalVRegs.insert(li->reg);
463    }
464  }
465}
466
467bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
468                                     const PBQP::Solution &solution) {
469  // Set to true if we have any spills
470  bool anotherRoundNeeded = false;
471
472  // Clear the existing allocation.
473  vrm->clearAllVirt();
474
475  const PBQPRAGraph &g = problem.getGraph();
476  // Iterate over the nodes mapping the PBQP solution to a register
477  // assignment.
478  for (auto NId : g.nodeIds()) {
479    unsigned vreg = problem.getVRegForNode(NId);
480    unsigned alloc = solution.getSelection(NId);
481
482    if (problem.isPRegOption(vreg, alloc)) {
483      unsigned preg = problem.getPRegForOption(vreg, alloc);
484      DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> "
485            << tri->getName(preg) << "\n");
486      assert(preg != 0 && "Invalid preg selected.");
487      vrm->assignVirt2Phys(vreg, preg);
488    } else if (problem.isSpillOption(vreg, alloc)) {
489      vregsToAlloc.erase(vreg);
490      SmallVector<unsigned, 8> newSpills;
491      LiveRangeEdit LRE(&lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
492      spiller->spill(LRE);
493
494      DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> SPILLED (Cost: "
495                   << LRE.getParent().weight << ", New vregs: ");
496
497      // Copy any newly inserted live intervals into the list of regs to
498      // allocate.
499      for (LiveRangeEdit::iterator itr = LRE.begin(), end = LRE.end();
500           itr != end; ++itr) {
501        LiveInterval &li = lis->getInterval(*itr);
502        assert(!li.empty() && "Empty spill range.");
503        DEBUG(dbgs() << PrintReg(li.reg, tri) << " ");
504        vregsToAlloc.insert(li.reg);
505      }
506
507      DEBUG(dbgs() << ")\n");
508
509      // We need another round if spill intervals were added.
510      anotherRoundNeeded |= !LRE.empty();
511    } else {
512      llvm_unreachable("Unknown allocation option.");
513    }
514  }
515
516  return !anotherRoundNeeded;
517}
518
519
520void RegAllocPBQP::finalizeAlloc() const {
521  // First allocate registers for the empty intervals.
522  for (RegSet::const_iterator
523         itr = emptyIntervalVRegs.begin(), end = emptyIntervalVRegs.end();
524         itr != end; ++itr) {
525    LiveInterval *li = &lis->getInterval(*itr);
526
527    unsigned physReg = mri->getSimpleHint(li->reg);
528
529    if (physReg == 0) {
530      const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
531      physReg = liRC->getRawAllocationOrder(*mf).front();
532    }
533
534    vrm->assignVirt2Phys(li->reg, physReg);
535  }
536}
537
538bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
539
540  mf = &MF;
541  tm = &mf->getTarget();
542  tri = tm->getRegisterInfo();
543  tii = tm->getInstrInfo();
544  mri = &mf->getRegInfo();
545
546  lis = &getAnalysis<LiveIntervals>();
547  lss = &getAnalysis<LiveStacks>();
548  mbfi = &getAnalysis<MachineBlockFrequencyInfo>();
549
550  calculateSpillWeightsAndHints(*lis, MF, getAnalysis<MachineLoopInfo>(),
551                                *mbfi);
552
553  vrm = &getAnalysis<VirtRegMap>();
554  spiller.reset(createInlineSpiller(*this, MF, *vrm));
555
556  mri->freezeReservedRegs(MF);
557
558  DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getName() << "\n");
559
560  // Allocator main loop:
561  //
562  // * Map current regalloc problem to a PBQP problem
563  // * Solve the PBQP problem
564  // * Map the solution back to a register allocation
565  // * Spill if necessary
566  //
567  // This process is continued till no more spills are generated.
568
569  // Find the vreg intervals in need of allocation.
570  findVRegIntervalsToAlloc();
571
572#ifndef NDEBUG
573  const Function* func = mf->getFunction();
574  std::string fqn =
575    func->getParent()->getModuleIdentifier() + "." +
576    func->getName().str();
577#endif
578
579  // If there are non-empty intervals allocate them using pbqp.
580  if (!vregsToAlloc.empty()) {
581
582    bool pbqpAllocComplete = false;
583    unsigned round = 0;
584
585    while (!pbqpAllocComplete) {
586      DEBUG(dbgs() << "  PBQP Regalloc round " << round << ":\n");
587
588      std::unique_ptr<PBQPRAProblem> problem(
589          builder->build(mf, lis, mbfi, vregsToAlloc));
590
591#ifndef NDEBUG
592      if (pbqpDumpGraphs) {
593        std::ostringstream rs;
594        rs << round;
595        std::string graphFileName(fqn + "." + rs.str() + ".pbqpgraph");
596        std::string tmp;
597        raw_fd_ostream os(graphFileName.c_str(), tmp, sys::fs::F_Text);
598        DEBUG(dbgs() << "Dumping graph for round " << round << " to \""
599              << graphFileName << "\"\n");
600        problem->getGraph().dump(os);
601      }
602#endif
603
604      PBQP::Solution solution =
605        PBQP::RegAlloc::solve(problem->getGraph());
606
607      pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
608
609      ++round;
610    }
611  }
612
613  // Finalise allocation, allocate empty ranges.
614  finalizeAlloc();
615  vregsToAlloc.clear();
616  emptyIntervalVRegs.clear();
617
618  DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
619
620  return true;
621}
622
623FunctionPass *
624llvm::createPBQPRegisterAllocator(std::unique_ptr<PBQPBuilder> &builder,
625                                  char *customPassID) {
626  return new RegAllocPBQP(builder, customPassID);
627}
628
629FunctionPass* llvm::createDefaultPBQPRegisterAllocator() {
630  std::unique_ptr<PBQPBuilder> Builder;
631  if (pbqpCoalescing)
632    Builder.reset(new PBQPBuilderWithCoalescing());
633  else
634    Builder.reset(new PBQPBuilder());
635  return createPBQPRegisterAllocator(Builder);
636}
637
638#undef DEBUG_TYPE
639