TailDuplication.cpp revision 2eda50a5ca9653234c45971187959c4337d6f6b9 
1//===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This pass duplicates basic blocks ending in unconditional branches into
11// the tails of their predecessors.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "tailduplication"
16#include "llvm/Function.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/CodeGen/MachineModuleInfo.h"
19#include "llvm/CodeGen/MachineFunctionPass.h"
20#include "llvm/CodeGen/MachineRegisterInfo.h"
21#include "llvm/CodeGen/MachineSSAUpdater.h"
22#include "llvm/Target/TargetInstrInfo.h"
23#include "llvm/Support/CommandLine.h"
24#include "llvm/Support/Debug.h"
25#include "llvm/Support/ErrorHandling.h"
26#include "llvm/Support/raw_ostream.h"
27#include "llvm/ADT/SmallSet.h"
28#include "llvm/ADT/SetVector.h"
29#include "llvm/ADT/Statistic.h"
30using namespace llvm;
31
32STATISTIC(NumTails     , "Number of tails duplicated");
33STATISTIC(NumTailDups  , "Number of tail duplicated blocks");
34STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
35STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
36
37// Heuristic for tail duplication.
38static cl::opt<unsigned>
39TailDuplicateSize("tail-dup-size",
40                  cl::desc("Maximum instructions to consider tail duplicating"),
41                  cl::init(2), cl::Hidden);
42
43static cl::opt<bool>
44TailDupVerify("tail-dup-verify",
45              cl::desc("Verify sanity of PHI instructions during taildup"),
46              cl::init(false), cl::Hidden);
47
48static cl::opt<unsigned>
49TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
50
51typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
52
53namespace {
54  /// TailDuplicatePass - Perform tail duplication.
55  class TailDuplicatePass : public MachineFunctionPass {
56    bool PreRegAlloc;
57    const TargetInstrInfo *TII;
58    MachineModuleInfo *MMI;
59    MachineRegisterInfo *MRI;
60
61    // SSAUpdateVRs - A list of virtual registers for which to update SSA form.
62    SmallVector<unsigned, 16> SSAUpdateVRs;
63
64    // SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
65    // source virtual registers.
66    DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
67
68  public:
69    static char ID;
70    explicit TailDuplicatePass(bool PreRA) :
71      MachineFunctionPass(&ID), PreRegAlloc(PreRA) {}
72
73    virtual bool runOnMachineFunction(MachineFunction &MF);
74    virtual const char *getPassName() const { return "Tail Duplication"; }
75
76  private:
77    void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
78                           MachineBasicBlock *BB);
79    void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
80                    MachineBasicBlock *PredBB,
81                    DenseMap<unsigned, unsigned> &LocalVRMap,
82                    SmallVector<std::pair<unsigned,unsigned>, 4> &Copies);
83    void DuplicateInstruction(MachineInstr *MI,
84                              MachineBasicBlock *TailBB,
85                              MachineBasicBlock *PredBB,
86                              MachineFunction &MF,
87                              DenseMap<unsigned, unsigned> &LocalVRMap);
88    void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
89                              SmallVector<MachineBasicBlock*, 8> &TDBBs,
90                              SmallSetVector<MachineBasicBlock*, 8> &Succs);
91    bool TailDuplicateBlocks(MachineFunction &MF);
92    bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
93                       SmallVector<MachineBasicBlock*, 8> &TDBBs,
94                       SmallVector<MachineInstr*, 16> &Copies);
95    void RemoveDeadBlock(MachineBasicBlock *MBB);
96  };
97
98  char TailDuplicatePass::ID = 0;
99}
100
101FunctionPass *llvm::createTailDuplicatePass(bool PreRegAlloc) {
102  return new TailDuplicatePass(PreRegAlloc);
103}
104
105bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
106  TII = MF.getTarget().getInstrInfo();
107  MRI = &MF.getRegInfo();
108  MMI = getAnalysisIfAvailable<MachineModuleInfo>();
109
110  bool MadeChange = false;
111  bool MadeChangeThisIteration = true;
112  while (MadeChangeThisIteration) {
113    MadeChangeThisIteration = false;
114    MadeChangeThisIteration |= TailDuplicateBlocks(MF);
115    MadeChange |= MadeChangeThisIteration;
116  }
117
118  return MadeChange;
119}
120
121static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
122  for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
123    MachineBasicBlock *MBB = I;
124    SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
125                                                MBB->pred_end());
126    MachineBasicBlock::iterator MI = MBB->begin();
127    while (MI != MBB->end()) {
128      if (MI->getOpcode() != TargetInstrInfo::PHI)
129        break;
130      for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
131             PE = Preds.end(); PI != PE; ++PI) {
132        MachineBasicBlock *PredBB = *PI;
133        bool Found = false;
134        for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
135          MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
136          if (PHIBB == PredBB) {
137            Found = true;
138            break;
139          }
140        }
141        if (!Found) {
142          dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
143          dbgs() << "  missing input from predecessor BB#"
144                 << PredBB->getNumber() << '\n';
145          llvm_unreachable(0);
146        }
147      }
148
149      for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
150        MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
151        if (CheckExtra && !Preds.count(PHIBB)) {
152          // This is not a hard error.
153          dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
154                 << ": " << *MI;
155          dbgs() << "  extra input from predecessor BB#"
156                 << PHIBB->getNumber() << '\n';
157        }
158        if (PHIBB->getNumber() < 0) {
159          dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
160          dbgs() << "  non-existing BB#" << PHIBB->getNumber() << '\n';
161          llvm_unreachable(0);
162        }
163      }
164      ++MI;
165    }
166  }
167}
168
169/// TailDuplicateBlocks - Look for small blocks that are unconditionally
170/// branched to and do not fall through. Tail-duplicate their instructions
171/// into their predecessors to eliminate (dynamic) branches.
172bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
173  bool MadeChange = false;
174
175  if (PreRegAlloc && TailDupVerify) {
176    DEBUG(dbgs() << "\n*** Before tail-duplicating\n");
177    VerifyPHIs(MF, true);
178  }
179
180  SmallVector<MachineInstr*, 8> NewPHIs;
181  MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
182
183  for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
184    MachineBasicBlock *MBB = I++;
185
186    if (NumTails == TailDupLimit)
187      break;
188
189    // Only duplicate blocks that end with unconditional branches.
190    if (MBB->canFallThrough())
191      continue;
192
193    // Save the successors list.
194    SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
195                                                MBB->succ_end());
196
197    SmallVector<MachineBasicBlock*, 8> TDBBs;
198    SmallVector<MachineInstr*, 16> Copies;
199    if (TailDuplicate(MBB, MF, TDBBs, Copies)) {
200      ++NumTails;
201
202      // TailBB's immediate successors are now successors of those predecessors
203      // which duplicated TailBB. Add the predecessors as sources to the PHI
204      // instructions.
205      bool isDead = MBB->pred_empty();
206      if (PreRegAlloc)
207        UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
208
209      // If it is dead, remove it.
210      if (isDead) {
211        NumInstrDups -= MBB->size();
212        RemoveDeadBlock(MBB);
213        ++NumDeadBlocks;
214      }
215
216      // Update SSA form.
217      if (!SSAUpdateVRs.empty()) {
218        for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
219          unsigned VReg = SSAUpdateVRs[i];
220          SSAUpdate.Initialize(VReg);
221
222          // If the original definition is still around, add it as an available
223          // value.
224          MachineInstr *DefMI = MRI->getVRegDef(VReg);
225          MachineBasicBlock *DefBB = 0;
226          if (DefMI) {
227            DefBB = DefMI->getParent();
228            SSAUpdate.AddAvailableValue(DefBB, VReg);
229          }
230
231          // Add the new vregs as available values.
232          DenseMap<unsigned, AvailableValsTy>::iterator LI =
233            SSAUpdateVals.find(VReg);
234          for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
235            MachineBasicBlock *SrcBB = LI->second[j].first;
236            unsigned SrcReg = LI->second[j].second;
237            SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
238          }
239
240          // Rewrite uses that are outside of the original def's block.
241          MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
242          while (UI != MRI->use_end()) {
243            MachineOperand &UseMO = UI.getOperand();
244            MachineInstr *UseMI = &*UI;
245            ++UI;
246            if (UseMI->getParent() == DefBB)
247              continue;
248            SSAUpdate.RewriteUse(UseMO);
249          }
250        }
251
252        SSAUpdateVRs.clear();
253        SSAUpdateVals.clear();
254      }
255
256      // Eliminate some of the copies inserted tail duplication to maintain
257      // SSA form.
258      for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
259        MachineInstr *Copy = Copies[i];
260        unsigned Src, Dst, SrcSR, DstSR;
261        if (TII->isMoveInstr(*Copy, Src, Dst, SrcSR, DstSR)) {
262          MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
263          if (++UI == MRI->use_end()) {
264            // Copy is the only use. Do trivial copy propagation here.
265            MRI->replaceRegWith(Dst, Src);
266            Copy->eraseFromParent();
267          }
268        }
269      }
270
271      if (PreRegAlloc && TailDupVerify)
272        VerifyPHIs(MF, false);
273      MadeChange = true;
274    }
275  }
276
277  return MadeChange;
278}
279
280static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
281                         const MachineRegisterInfo *MRI) {
282  for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
283         UE = MRI->use_end(); UI != UE; ++UI) {
284    MachineInstr *UseMI = &*UI;
285    if (UseMI->getParent() != BB)
286      return true;
287  }
288  return false;
289}
290
291static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
292  for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
293    if (MI->getOperand(i+1).getMBB() == SrcBB)
294      return i;
295  return 0;
296}
297
298/// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
299/// SSA update.
300void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
301                                          MachineBasicBlock *BB) {
302  DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
303  if (LI != SSAUpdateVals.end())
304    LI->second.push_back(std::make_pair(BB, NewReg));
305  else {
306    AvailableValsTy Vals;
307    Vals.push_back(std::make_pair(BB, NewReg));
308    SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
309    SSAUpdateVRs.push_back(OrigReg);
310  }
311}
312
313/// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
314/// Remember the source register that's contributed by PredBB and update SSA
315/// update map.
316void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
317                                   MachineBasicBlock *TailBB,
318                                   MachineBasicBlock *PredBB,
319                                   DenseMap<unsigned, unsigned> &LocalVRMap,
320                         SmallVector<std::pair<unsigned,unsigned>, 4> &Copies) {
321  unsigned DefReg = MI->getOperand(0).getReg();
322  unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
323  assert(SrcOpIdx && "Unable to find matching PHI source?");
324  unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
325  const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
326  LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
327
328  // Insert a copy from source to the end of the block. The def register is the
329  // available value liveout of the block.
330  unsigned NewDef = MRI->createVirtualRegister(RC);
331  Copies.push_back(std::make_pair(NewDef, SrcReg));
332  if (isDefLiveOut(DefReg, TailBB, MRI))
333    AddSSAUpdateEntry(DefReg, NewDef, PredBB);
334
335  // Remove PredBB from the PHI node.
336  MI->RemoveOperand(SrcOpIdx+1);
337  MI->RemoveOperand(SrcOpIdx);
338  if (MI->getNumOperands() == 1)
339    MI->eraseFromParent();
340}
341
342/// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
343/// the source operands due to earlier PHI translation.
344void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
345                                     MachineBasicBlock *TailBB,
346                                     MachineBasicBlock *PredBB,
347                                     MachineFunction &MF,
348                                     DenseMap<unsigned, unsigned> &LocalVRMap) {
349  MachineInstr *NewMI = MF.CloneMachineInstr(MI);
350  for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
351    MachineOperand &MO = NewMI->getOperand(i);
352    if (!MO.isReg())
353      continue;
354    unsigned Reg = MO.getReg();
355    if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
356      continue;
357    if (MO.isDef()) {
358      const TargetRegisterClass *RC = MRI->getRegClass(Reg);
359      unsigned NewReg = MRI->createVirtualRegister(RC);
360      MO.setReg(NewReg);
361      LocalVRMap.insert(std::make_pair(Reg, NewReg));
362      if (isDefLiveOut(Reg, TailBB, MRI))
363        AddSSAUpdateEntry(Reg, NewReg, PredBB);
364    } else {
365      DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
366      if (VI != LocalVRMap.end())
367        MO.setReg(VI->second);
368    }
369  }
370  PredBB->insert(PredBB->end(), NewMI);
371}
372
373/// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
374/// blocks, the successors have gained new predecessors. Update the PHI
375/// instructions in them accordingly.
376void
377TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
378                                  SmallVector<MachineBasicBlock*, 8> &TDBBs,
379                                  SmallSetVector<MachineBasicBlock*,8> &Succs) {
380  for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
381         SE = Succs.end(); SI != SE; ++SI) {
382    MachineBasicBlock *SuccBB = *SI;
383    for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
384         II != EE; ++II) {
385      if (II->getOpcode() != TargetInstrInfo::PHI)
386        break;
387      unsigned Idx = 0;
388      for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
389        MachineOperand &MO = II->getOperand(i+1);
390        if (MO.getMBB() == FromBB) {
391          Idx = i;
392          break;
393        }
394      }
395
396      assert(Idx != 0);
397      MachineOperand &MO0 = II->getOperand(Idx);
398      unsigned Reg = MO0.getReg();
399      if (isDead) {
400        // Folded into the previous BB.
401        // There could be duplicate phi source entries. FIXME: Should sdisel
402        // or earlier pass fixed this?
403        for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
404          MachineOperand &MO = II->getOperand(i+1);
405          if (MO.getMBB() == FromBB) {
406            II->RemoveOperand(i+1);
407            II->RemoveOperand(i);
408          }
409        }
410        II->RemoveOperand(Idx+1);
411        II->RemoveOperand(Idx);
412      }
413      DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
414      if (LI != SSAUpdateVals.end()) {
415        // This register is defined in the tail block.
416        for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
417          MachineBasicBlock *SrcBB = LI->second[j].first;
418          unsigned SrcReg = LI->second[j].second;
419          II->addOperand(MachineOperand::CreateReg(SrcReg, false));
420          II->addOperand(MachineOperand::CreateMBB(SrcBB));
421        }
422      } else {
423        // Live in tail block, must also be live in predecessors.
424        for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
425          MachineBasicBlock *SrcBB = TDBBs[j];
426          II->addOperand(MachineOperand::CreateReg(Reg, false));
427          II->addOperand(MachineOperand::CreateMBB(SrcBB));
428        }
429      }
430    }
431  }
432}
433
434/// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
435/// of its predecessors.
436bool
437TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
438                                 SmallVector<MachineBasicBlock*, 8> &TDBBs,
439                                 SmallVector<MachineInstr*, 16> &Copies) {
440  // Don't try to tail-duplicate single-block loops.
441  if (TailBB->isSuccessor(TailBB))
442    return false;
443
444  // Set the limit on the number of instructions to duplicate, with a default
445  // of one less than the tail-merge threshold. When optimizing for size,
446  // duplicate only one, because one branch instruction can be eliminated to
447  // compensate for the duplication.
448  unsigned MaxDuplicateCount;
449  if (!TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
450    // If the target has hardware branch prediction that can handle indirect
451    // branches, duplicating them can often make them predictable when there
452    // are common paths through the code.  The limit needs to be high enough
453    // to allow undoing the effects of tail merging.
454    MaxDuplicateCount = 20;
455  else if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
456    MaxDuplicateCount = 1;
457  else
458    MaxDuplicateCount = TailDuplicateSize;
459
460  // Check the instructions in the block to determine whether tail-duplication
461  // is invalid or unlikely to be profitable.
462  unsigned InstrCount = 0;
463  bool HasCall = false;
464  for (MachineBasicBlock::iterator I = TailBB->begin();
465       I != TailBB->end(); ++I) {
466    // Non-duplicable things shouldn't be tail-duplicated.
467    if (I->getDesc().isNotDuplicable()) return false;
468    // Do not duplicate 'return' instructions if this is a pre-regalloc run.
469    // A return may expand into a lot more instructions (e.g. reload of callee
470    // saved registers) after PEI.
471    if (PreRegAlloc && I->getDesc().isReturn()) return false;
472    // Don't duplicate more than the threshold.
473    if (InstrCount == MaxDuplicateCount) return false;
474    // Remember if we saw a call.
475    if (I->getDesc().isCall()) HasCall = true;
476    if (I->getOpcode() != TargetInstrInfo::PHI)
477      InstrCount += 1;
478  }
479  // Heuristically, don't tail-duplicate calls if it would expand code size,
480  // as it's less likely to be worth the extra cost.
481  if (InstrCount > 1 && HasCall)
482    return false;
483
484  DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
485
486  // Iterate through all the unique predecessors and tail-duplicate this
487  // block into them, if possible. Copying the list ahead of time also
488  // avoids trouble with the predecessor list reallocating.
489  bool Changed = false;
490  SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
491                                              TailBB->pred_end());
492  for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
493       PE = Preds.end(); PI != PE; ++PI) {
494    MachineBasicBlock *PredBB = *PI;
495
496    assert(TailBB != PredBB &&
497           "Single-block loop should have been rejected earlier!");
498    if (PredBB->succ_size() > 1) continue;
499
500    MachineBasicBlock *PredTBB, *PredFBB;
501    SmallVector<MachineOperand, 4> PredCond;
502    if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
503      continue;
504    if (!PredCond.empty())
505      continue;
506    // EH edges are ignored by AnalyzeBranch.
507    if (PredBB->succ_size() != 1)
508      continue;
509    // Don't duplicate into a fall-through predecessor (at least for now).
510    if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
511      continue;
512
513    DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
514                 << "From Succ: " << *TailBB);
515
516    TDBBs.push_back(PredBB);
517
518    // Remove PredBB's unconditional branch.
519    TII->RemoveBranch(*PredBB);
520
521    // Clone the contents of TailBB into PredBB.
522    DenseMap<unsigned, unsigned> LocalVRMap;
523    SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
524    MachineBasicBlock::iterator I = TailBB->begin();
525    while (I != TailBB->end()) {
526      MachineInstr *MI = &*I;
527      ++I;
528      if (MI->getOpcode() == TargetInstrInfo::PHI) {
529        // Replace the uses of the def of the PHI with the register coming
530        // from PredBB.
531        ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos);
532      } else {
533        // Replace def of virtual registers with new registers, and update
534        // uses with PHI source register or the new registers.
535        DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap);
536      }
537    }
538    MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
539    for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
540      const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
541      TII->copyRegToReg(*PredBB, Loc, CopyInfos[i].first,
542                        CopyInfos[i].second, RC,RC);
543      MachineInstr *CopyMI = prior(Loc);
544      Copies.push_back(CopyMI);
545    }
546    NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
547
548    // Update the CFG.
549    PredBB->removeSuccessor(PredBB->succ_begin());
550    assert(PredBB->succ_empty() &&
551           "TailDuplicate called on block with multiple successors!");
552    for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
553           E = TailBB->succ_end(); I != E; ++I)
554      PredBB->addSuccessor(*I);
555
556    Changed = true;
557    ++NumTailDups;
558  }
559
560  // If TailBB was duplicated into all its predecessors except for the prior
561  // block, which falls through unconditionally, move the contents of this
562  // block into the prior block.
563  MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
564  MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
565  SmallVector<MachineOperand, 4> PriorCond;
566  bool PriorUnAnalyzable =
567    TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true);
568  // This has to check PrevBB->succ_size() because EH edges are ignored by
569  // AnalyzeBranch.
570  if (!PriorUnAnalyzable && PriorCond.empty() && !PriorTBB &&
571      TailBB->pred_size() == 1 && PrevBB->succ_size() == 1 &&
572      !TailBB->hasAddressTaken()) {
573    DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
574          << "From MBB: " << *TailBB);
575    if (PreRegAlloc) {
576      DenseMap<unsigned, unsigned> LocalVRMap;
577      SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
578      MachineBasicBlock::iterator I = TailBB->begin();
579      // Process PHI instructions first.
580      while (I != TailBB->end() && I->getOpcode() == TargetInstrInfo::PHI) {
581        // Replace the uses of the def of the PHI with the register coming
582        // from PredBB.
583        MachineInstr *MI = &*I++;
584        ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos);
585        if (MI->getParent())
586          MI->eraseFromParent();
587      }
588
589      // Now copy the non-PHI instructions.
590      while (I != TailBB->end()) {
591        // Replace def of virtual registers with new registers, and update
592        // uses with PHI source register or the new registers.
593        MachineInstr *MI = &*I++;
594        DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap);
595        MI->eraseFromParent();
596      }
597      MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
598      for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
599        const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
600        TII->copyRegToReg(*PrevBB, Loc, CopyInfos[i].first,
601                          CopyInfos[i].second, RC, RC);
602        MachineInstr *CopyMI = prior(Loc);
603        Copies.push_back(CopyMI);
604      }
605    } else {
606      // No PHIs to worry about, just splice the instructions over.
607      PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
608    }
609    PrevBB->removeSuccessor(PrevBB->succ_begin());
610    assert(PrevBB->succ_empty());
611    PrevBB->transferSuccessors(TailBB);
612    TDBBs.push_back(PrevBB);
613    Changed = true;
614  }
615
616  return Changed;
617}
618
619/// RemoveDeadBlock - Remove the specified dead machine basic block from the
620/// function, updating the CFG.
621void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
622  assert(MBB->pred_empty() && "MBB must be dead!");
623  DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
624
625  // Remove all successors.
626  while (!MBB->succ_empty())
627    MBB->removeSuccessor(MBB->succ_end()-1);
628
629  // If there are any labels in the basic block, unregister them from
630  // MachineModuleInfo.
631  if (MMI && !MBB->empty()) {
632    for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
633         I != E; ++I) {
634      if (I->isLabel())
635        // The label ID # is always operand #0, an immediate.
636        MMI->InvalidateLabel(I->getOperand(0).getImm());
637    }
638  }
639
640  // Remove the block.
641  MBB->eraseFromParent();
642}
643
644