SparcTargetMachine.cpp revision 0280aa9795a528b7a6f6c31b1b95a2ba04e13730 
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "SparcV8TargetMachine.h"
14#include "SparcV8.h"
15#include "llvm/Module.h"
16#include "llvm/PassManager.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/Target/TargetMachineImpls.h"
20#include "llvm/Transforms/Scalar.h"
21using namespace llvm;
22
23// allocateSparcV8TargetMachine - Allocate and return a subclass of
24// TargetMachine that implements the SparcV8 backend.
25//
26TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
27                                                  IntrinsicLowering *IL) {
28  return new SparcV8TargetMachine(M, IL);
29}
30
31/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
32///
33SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
34                                           IntrinsicLowering *IL)
35  : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
36    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
37}
38
39/// addPassesToEmitAssembly - Add passes to the specified pass manager
40/// to implement a static compiler for this target.
41///
42bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
43					       std::ostream &Out) {
44  // FIXME: Implement efficient support for garbage collection intrinsics.
45  PM.add(createLowerGCPass());
46
47  // Replace malloc and free instructions with library calls.
48  PM.add(createLowerAllocationsPass());
49
50  // FIXME: implement the select instruction in the instruction selector.
51  PM.add(createLowerSelectPass());
52
53  // FIXME: implement the switch instruction in the instruction selector.
54  PM.add(createLowerSwitchPass());
55
56  // FIXME: implement the invoke/unwind instructions!
57  PM.add(createLowerInvokePass());
58
59  PM.add(createSparcV8SimpleInstructionSelector(*this));
60
61  // Print machine instructions as they were initially generated.
62  if (PrintMachineCode)
63    PM.add(createMachineFunctionPrinterPass(&std::cerr));
64
65  PM.add(createRegisterAllocator());
66  PM.add(createPrologEpilogCodeInserter());
67
68  // Print machine instructions after register allocation and prolog/epilog
69  // insertion.
70  if (PrintMachineCode)
71    PM.add(createMachineFunctionPrinterPass(&std::cerr));
72
73  PM.add(createSparcV8DelaySlotFillerPass(*this));
74
75  // Print machine instructions after filling delay slots.
76  if (PrintMachineCode)
77    PM.add(createMachineFunctionPrinterPass(&std::cerr));
78
79  // Output assembly language.
80  PM.add(createSparcV8CodePrinterPass(Out, *this));
81
82  // Delete the MachineInstrs we generated, since they're no longer needed.
83  PM.add(createMachineCodeDeleter());
84  return false;
85}
86
87/// addPassesToJITCompile - Add passes to the specified pass manager to
88/// implement a fast dynamic compiler for this target.
89///
90void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
91  // FIXME: Implement efficient support for garbage collection intrinsics.
92  PM.add(createLowerGCPass());
93
94  // Replace malloc and free instructions with library calls.
95  PM.add(createLowerAllocationsPass());
96
97  // FIXME: implement the select instruction in the instruction selector.
98  PM.add(createLowerSelectPass());
99
100  // FIXME: implement the switch instruction in the instruction selector.
101  PM.add(createLowerSwitchPass());
102
103  // FIXME: implement the invoke/unwind instructions!
104  PM.add(createLowerInvokePass());
105
106  PM.add(createSparcV8SimpleInstructionSelector(TM));
107
108  // Print machine instructions as they were initially generated.
109  if (PrintMachineCode)
110    PM.add(createMachineFunctionPrinterPass(&std::cerr));
111
112  PM.add(createRegisterAllocator());
113  PM.add(createPrologEpilogCodeInserter());
114
115  // Print machine instructions after register allocation and prolog/epilog
116  // insertion.
117  if (PrintMachineCode)
118    PM.add(createMachineFunctionPrinterPass(&std::cerr));
119
120  PM.add(createSparcV8DelaySlotFillerPass(TM));
121
122  // Print machine instructions after filling delay slots.
123  if (PrintMachineCode)
124    PM.add(createMachineFunctionPrinterPass(&std::cerr));
125}
126