SparcTargetMachine.cpp revision 03a83c90da38a3a3cf14f2003c730f0764e7b9cf
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include <iostream> 24using namespace llvm; 25 26namespace { 27 // Register the target. 28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 29} 30 31/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 32/// 33SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 34 IntrinsicLowering *IL, 35 const std::string &FS) 36 : TargetMachine("SparcV8", IL, false, 4, 4), 37 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { 38} 39 40unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 41 std::string TT = M.getTargetTriple(); 42 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 43 return 20; 44 45 if (M.getEndianness() == Module::BigEndian && 46 M.getPointerSize() == Module::Pointer32) 47#ifdef __sparc__ 48 return 20; // BE/32 ==> Prefer sparcv8 on sparc 49#else 50 return 5; // BE/32 ==> Prefer ppc elsewhere 51#endif 52 else if (M.getEndianness() != Module::AnyEndianness || 53 M.getPointerSize() != Module::AnyPointerSize) 54 return 0; // Match for some other target 55 56 return 0; 57} 58 59/// addPassesToEmitFile - Add passes to the specified pass manager 60/// to implement a static compiler for this target. 61/// 62bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 63 std::ostream &Out, 64 CodeGenFileType FileType, 65 bool Fast) { 66 if (FileType != TargetMachine::AssemblyFile) return true; 67 68 // FIXME: Implement efficient support for garbage collection intrinsics. 69 PM.add(createLowerGCPass()); 70 71 // Replace malloc and free instructions with library calls. 72 PM.add(createLowerAllocationsPass()); 73 74 // FIXME: implement the switch instruction in the instruction selector. 75 PM.add(createLowerSwitchPass()); 76 77 // FIXME: implement the invoke/unwind instructions! 78 PM.add(createLowerInvokePass()); 79 80 // Make sure that no unreachable blocks are instruction selected. 81 PM.add(createUnreachableBlockEliminationPass()); 82 83 // FIXME: implement the select instruction in the instruction selector. 84 PM.add(createLowerSelectPass()); 85 86 // Print LLVM code input to instruction selector: 87 if (PrintMachineCode) 88 PM.add(new PrintFunctionPass()); 89 90 PM.add(createSparcV8SimpleInstructionSelector(*this)); 91 92 // Print machine instructions as they were initially generated. 93 if (PrintMachineCode) 94 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 95 96 PM.add(createRegisterAllocator()); 97 PM.add(createPrologEpilogCodeInserter()); 98 99 // Print machine instructions after register allocation and prolog/epilog 100 // insertion. 101 if (PrintMachineCode) 102 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 103 104 PM.add(createSparcV8FPMoverPass(*this)); 105 PM.add(createSparcV8DelaySlotFillerPass(*this)); 106 107 // Print machine instructions after filling delay slots. 108 if (PrintMachineCode) 109 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 110 111 // Output assembly language. 112 PM.add(createSparcV8CodePrinterPass(Out, *this)); 113 114 // Delete the MachineInstrs we generated, since they're no longer needed. 115 PM.add(createMachineCodeDeleter()); 116 return false; 117} 118 119