SparcTargetMachine.cpp revision 0d170a7969e7e36ad00afe596f2937f0c74d2b49
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include "llvm/Support/CommandLine.h" 24#include <iostream> 25using namespace llvm; 26 27namespace { 28 // Register the target. 29 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 30} 31 32/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 33/// 34SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 35 IntrinsicLowering *IL, 36 const std::string &FS) 37 : TargetMachine("SparcV8", IL, false, 4, 4), 38 Subtarget(M, FS), 39 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { 40} 41 42unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 43 std::string TT = M.getTargetTriple(); 44 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 45 return 20; 46 47 if (M.getEndianness() == Module::BigEndian && 48 M.getPointerSize() == Module::Pointer32) 49#ifdef __sparc__ 50 return 20; // BE/32 ==> Prefer sparcv8 on sparc 51#else 52 return 5; // BE/32 ==> Prefer ppc elsewhere 53#endif 54 else if (M.getEndianness() != Module::AnyEndianness || 55 M.getPointerSize() != Module::AnyPointerSize) 56 return 0; // Match for some other target 57 58 return 0; 59} 60 61/// addPassesToEmitFile - Add passes to the specified pass manager 62/// to implement a static compiler for this target. 63/// 64bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 65 std::ostream &Out, 66 CodeGenFileType FileType, 67 bool Fast) { 68 if (FileType != TargetMachine::AssemblyFile) return true; 69 70 // FIXME: Implement efficient support for garbage collection intrinsics. 71 PM.add(createLowerGCPass()); 72 73 // FIXME: implement the invoke/unwind instructions! 74 PM.add(createLowerInvokePass()); 75 76 // FIXME: implement the switch instruction in the instruction selector. 77 PM.add(createLowerSwitchPass()); 78 79 // Print LLVM code input to instruction selector: 80 if (PrintMachineCode) 81 PM.add(new PrintFunctionPass()); 82 83 // Make sure that no unreachable blocks are instruction selected. 84 PM.add(createUnreachableBlockEliminationPass()); 85 86 PM.add(createSparcV8ISelDag(*this)); 87 88 // Print machine instructions as they were initially generated. 89 if (PrintMachineCode) 90 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 91 92 PM.add(createRegisterAllocator()); 93 PM.add(createPrologEpilogCodeInserter()); 94 95 // Print machine instructions after register allocation and prolog/epilog 96 // insertion. 97 if (PrintMachineCode) 98 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 99 100 PM.add(createSparcV8FPMoverPass(*this)); 101 102 PM.add(createSparcV8DelaySlotFillerPass(*this)); 103 104 // Print machine instructions after filling delay slots. 105 if (PrintMachineCode) 106 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 107 108 // Output assembly language. 109 PM.add(createSparcV8CodePrinterPass(Out, *this)); 110 111 // Delete the MachineInstrs we generated, since they're no longer needed. 112 PM.add(createMachineCodeDeleter()); 113 return false; 114} 115 116