SparcTargetMachine.cpp revision 71d24aab2d52986cc8203d0c268adb88b0001bc4 
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "SparcV8TargetMachine.h"
14#include "SparcV8.h"
15#include "llvm/Module.h"
16#include "llvm/PassManager.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/Target/TargetMachineImpls.h"
20#include "llvm/Target/TargetMachineRegistry.h"
21#include "llvm/Transforms/Scalar.h"
22#include <iostream>
23using namespace llvm;
24
25namespace {
26  // Register the target.
27  RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
28}
29
30// allocateSparcV8TargetMachine - Allocate and return a subclass of
31// TargetMachine that implements the SparcV8 backend.
32//
33TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
34                                                  IntrinsicLowering *IL) {
35  return new SparcV8TargetMachine(M, IL);
36}
37
38/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
39///
40SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
41                                           IntrinsicLowering *IL)
42  : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
43    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
44}
45
46/// addPassesToEmitAssembly - Add passes to the specified pass manager
47/// to implement a static compiler for this target.
48///
49bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
50					       std::ostream &Out) {
51  // FIXME: Implement efficient support for garbage collection intrinsics.
52  PM.add(createLowerGCPass());
53
54  // Replace malloc and free instructions with library calls.
55  PM.add(createLowerAllocationsPass());
56
57  // FIXME: implement the select instruction in the instruction selector.
58  PM.add(createLowerSelectPass());
59
60  // FIXME: implement the switch instruction in the instruction selector.
61  PM.add(createLowerSwitchPass());
62
63  // FIXME: implement the invoke/unwind instructions!
64  PM.add(createLowerInvokePass());
65
66  PM.add(createLowerConstantExpressionsPass());
67
68  // Make sure that no unreachable blocks are instruction selected.
69  PM.add(createUnreachableBlockEliminationPass());
70
71  PM.add(createSparcV8SimpleInstructionSelector(*this));
72
73  // Print machine instructions as they were initially generated.
74  if (PrintMachineCode)
75    PM.add(createMachineFunctionPrinterPass(&std::cerr));
76
77  PM.add(createRegisterAllocator());
78  PM.add(createPrologEpilogCodeInserter());
79
80  // Print machine instructions after register allocation and prolog/epilog
81  // insertion.
82  if (PrintMachineCode)
83    PM.add(createMachineFunctionPrinterPass(&std::cerr));
84
85  PM.add(createSparcV8DelaySlotFillerPass(*this));
86
87  // Print machine instructions after filling delay slots.
88  if (PrintMachineCode)
89    PM.add(createMachineFunctionPrinterPass(&std::cerr));
90
91  // Output assembly language.
92  PM.add(createSparcV8CodePrinterPass(Out, *this));
93
94  // Delete the MachineInstrs we generated, since they're no longer needed.
95  PM.add(createMachineCodeDeleter());
96  return false;
97}
98
99/// addPassesToJITCompile - Add passes to the specified pass manager to
100/// implement a fast dynamic compiler for this target.
101///
102void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
103  // FIXME: Implement efficient support for garbage collection intrinsics.
104  PM.add(createLowerGCPass());
105
106  // Replace malloc and free instructions with library calls.
107  PM.add(createLowerAllocationsPass());
108
109  // FIXME: implement the select instruction in the instruction selector.
110  PM.add(createLowerSelectPass());
111
112  // FIXME: implement the switch instruction in the instruction selector.
113  PM.add(createLowerSwitchPass());
114
115  // FIXME: implement the invoke/unwind instructions!
116  PM.add(createLowerInvokePass());
117
118  PM.add(createLowerConstantExpressionsPass());
119
120  // Make sure that no unreachable blocks are instruction selected.
121  PM.add(createUnreachableBlockEliminationPass());
122
123  PM.add(createSparcV8SimpleInstructionSelector(TM));
124
125  // Print machine instructions as they were initially generated.
126  if (PrintMachineCode)
127    PM.add(createMachineFunctionPrinterPass(&std::cerr));
128
129  PM.add(createRegisterAllocator());
130  PM.add(createPrologEpilogCodeInserter());
131
132  // Print machine instructions after register allocation and prolog/epilog
133  // insertion.
134  if (PrintMachineCode)
135    PM.add(createMachineFunctionPrinterPass(&std::cerr));
136
137  PM.add(createSparcV8DelaySlotFillerPass(TM));
138
139  // Print machine instructions after filling delay slots.
140  if (PrintMachineCode)
141    PM.add(createMachineFunctionPrinterPass(&std::cerr));
142}
143