SparcTargetMachine.cpp revision 7c419078876ca16ec82d4ddc5301f8fdaf0fe39e
1972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// 3972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// The LLVM Compiler Infrastructure 4972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// 5972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// This file was developed by the LLVM research group and is distributed under 6972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// the University of Illinois Open Source License. See LICENSE.TXT for details. 7972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// 8972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye//===----------------------------------------------------------------------===// 9972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// 10972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye// 11972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye//===----------------------------------------------------------------------===// 12972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 13972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "SparcV8TargetMachine.h" 14972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "SparcV8.h" 15ad728f97cd9b264462c96612a134bb700aa5233b(none)!davidm#include "llvm/Assembly/PrintModulePass.h" 16972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/Module.h" 17972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/PassManager.h" 18972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/CodeGen/MachineFunction.h" 19972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/CodeGen/Passes.h" 20972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/Target/TargetOptions.h" 21972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/Target/TargetMachineRegistry.h" 22972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/Transforms/Scalar.h" 23972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include "llvm/Support/CommandLine.h" 24972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#include <iostream> 25972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahayeusing namespace llvm; 26972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 27972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahayenamespace { 28972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye // Register the target. 29972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 30972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 31972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden, 32972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye cl::desc("Enable DAG-to-DAG isel for V8"), 33972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye cl::init(0)); 34972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye} 35972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 36972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 37972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye/// 38972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahayeSparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 39972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye IntrinsicLowering *IL, 40972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye const std::string &FS) 41972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye : TargetMachine("SparcV8", IL, false, 4, 4), 42972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { 43972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye} 44972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 45972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahayeunsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 46972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye std::string TT = M.getTargetTriple(); 47972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 48972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye return 20; 49972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 50972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye if (M.getEndianness() == Module::BigEndian && 51972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye M.getPointerSize() == Module::Pointer32) 52972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#ifdef __sparc__ 53972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye return 20; // BE/32 ==> Prefer sparcv8 on sparc 54972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#else 55972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye return 5; // BE/32 ==> Prefer ppc elsewhere 56972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye#endif 57972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye else if (M.getEndianness() != Module::AnyEndianness || 58972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye M.getPointerSize() != Module::AnyPointerSize) 59972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye return 0; // Match for some other target 60972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 61972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye return 0; 62972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye} 63972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 64972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye/// addPassesToEmitFile - Add passes to the specified pass manager 65972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye/// to implement a static compiler for this target. 66972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye/// 67972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahayebool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 68972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye std::ostream &Out, 69972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye CodeGenFileType FileType, 70972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye bool Fast) { 71972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye if (FileType != TargetMachine::AssemblyFile) return true; 72972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 73972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye // FIXME: Implement efficient support for garbage collection intrinsics. 74972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye PM.add(createLowerGCPass()); 75972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 7675f34ccb7dcdfd2b96e370824b3fd723b2f22b49David Mosberger-Tang // FIXME: implement the invoke/unwind instructions! 7775f34ccb7dcdfd2b96e370824b3fd723b2f22b49David Mosberger-Tang PM.add(createLowerInvokePass()); 78972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye 79972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye // FIXME: implement the switch instruction in the instruction selector. 80972aec70ba48f64db9b635a47a497cd65489d343esiee.fr!m.delahaye PM.add(createLowerSwitchPass()); 81 82 // Print LLVM code input to instruction selector: 83 if (PrintMachineCode) 84 PM.add(new PrintFunctionPass()); 85 86 if (!EnableV8DAGDAG) { 87 // Replace malloc and free instructions with library calls. 88 PM.add(createLowerAllocationsPass()); 89 PM.add(createLowerSelectPass()); 90 // Make sure that no unreachable blocks are instruction selected. 91 PM.add(createUnreachableBlockEliminationPass()); 92 PM.add(createSparcV8SimpleInstructionSelector(*this)); 93 } else { 94 // Make sure that no unreachable blocks are instruction selected. 95 PM.add(createUnreachableBlockEliminationPass()); 96 PM.add(createSparcV8ISelDag(*this)); 97 } 98 99 // Print machine instructions as they were initially generated. 100 if (PrintMachineCode) 101 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 102 103 PM.add(createRegisterAllocator()); 104 PM.add(createPrologEpilogCodeInserter()); 105 106 // Print machine instructions after register allocation and prolog/epilog 107 // insertion. 108 if (PrintMachineCode) 109 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 110 111 PM.add(createSparcV8FPMoverPass(*this)); 112 113 PM.add(createSparcV8DelaySlotFillerPass(*this)); 114 115 // Print machine instructions after filling delay slots. 116 if (PrintMachineCode) 117 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 118 119 // Output assembly language. 120 PM.add(createSparcV8CodePrinterPass(Out, *this)); 121 122 // Delete the MachineInstrs we generated, since they're no longer needed. 123 PM.add(createMachineCodeDeleter()); 124 return false; 125} 126 127