SparcTargetMachine.cpp revision 7c90f73a1b06040d971a3dd95a491031ae6238d5
1//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcTargetMachine.h" 14#include "Sparc.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include "llvm/Support/CommandLine.h" 24#include <iostream> 25using namespace llvm; 26 27namespace { 28 // Register the target. 29 RegisterTarget<SparcTargetMachine> X("sparc", " SPARC"); 30} 31 32/// SparcTargetMachine ctor - Create an ILP32 architecture model 33/// 34SparcTargetMachine::SparcTargetMachine(const Module &M, IntrinsicLowering *IL, 35 const std::string &FS) 36 : TargetMachine("Sparc", IL, false, 4, 4), 37 Subtarget(M, FS), InstrInfo(Subtarget), 38 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { 39} 40 41unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) { 42 std::string TT = M.getTargetTriple(); 43 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 44 return 20; 45 46 if (M.getEndianness() == Module::BigEndian && 47 M.getPointerSize() == Module::Pointer32) 48#ifdef __sparc__ 49 return 20; // BE/32 ==> Prefer sparc on sparc 50#else 51 return 5; // BE/32 ==> Prefer ppc elsewhere 52#endif 53 else if (M.getEndianness() != Module::AnyEndianness || 54 M.getPointerSize() != Module::AnyPointerSize) 55 return 0; // Match for some other target 56 57 return 0; 58} 59 60/// addPassesToEmitFile - Add passes to the specified pass manager 61/// to implement a static compiler for this target. 62/// 63bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out, 64 CodeGenFileType FileType, 65 bool Fast) { 66 if (FileType != TargetMachine::AssemblyFile) return true; 67 68 // FIXME: Implement efficient support for garbage collection intrinsics. 69 PM.add(createLowerGCPass()); 70 71 // FIXME: implement the invoke/unwind instructions! 72 PM.add(createLowerInvokePass()); 73 74 // FIXME: implement the switch instruction in the instruction selector. 75 PM.add(createLowerSwitchPass()); 76 77 // Print LLVM code input to instruction selector: 78 if (PrintMachineCode) 79 PM.add(new PrintFunctionPass()); 80 81 // Make sure that no unreachable blocks are instruction selected. 82 PM.add(createUnreachableBlockEliminationPass()); 83 84 PM.add(createSparcISelDag(*this)); 85 86 // Print machine instructions as they were initially generated. 87 if (PrintMachineCode) 88 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 89 90 PM.add(createRegisterAllocator()); 91 PM.add(createPrologEpilogCodeInserter()); 92 93 // Print machine instructions after register allocation and prolog/epilog 94 // insertion. 95 if (PrintMachineCode) 96 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 97 98 PM.add(createSparcFPMoverPass(*this)); 99 100 PM.add(createSparcDelaySlotFillerPass(*this)); 101 102 // Print machine instructions after filling delay slots. 103 if (PrintMachineCode) 104 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 105 106 // Output assembly language. 107 PM.add(createSparcCodePrinterPass(Out, *this)); 108 109 // Delete the MachineInstrs we generated, since they're no longer needed. 110 PM.add(createMachineCodeDeleter()); 111 return false; 112} 113 114