SparcTargetMachine.cpp revision 8a9acd1e316db2af9a2570e78fc96248713e4a8d 
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "SparcV8TargetMachine.h"
14#include "SparcV8.h"
15#include "llvm/Module.h"
16#include "llvm/PassManager.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/Target/TargetOptions.h"
20#include "llvm/Target/TargetMachineRegistry.h"
21#include "llvm/Transforms/Scalar.h"
22#include <iostream>
23using namespace llvm;
24
25namespace {
26  // Register the target.
27  RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
28}
29
30/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
31///
32SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
33                                           IntrinsicLowering *IL)
34  : TargetMachine("SparcV8", IL, false, 4, 4, 8, 4, 8),
35    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
36}
37
38/// addPassesToEmitAssembly - Add passes to the specified pass manager
39/// to implement a static compiler for this target.
40///
41bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
42					       std::ostream &Out) {
43  // FIXME: Implement efficient support for garbage collection intrinsics.
44  PM.add(createLowerGCPass());
45
46  // Replace malloc and free instructions with library calls.
47  PM.add(createLowerAllocationsPass());
48
49  // FIXME: implement the select instruction in the instruction selector.
50  PM.add(createLowerSelectPass());
51
52  // FIXME: implement the switch instruction in the instruction selector.
53  PM.add(createLowerSwitchPass());
54
55  // FIXME: implement the invoke/unwind instructions!
56  PM.add(createLowerInvokePass());
57
58  PM.add(createLowerConstantExpressionsPass());
59
60  // Make sure that no unreachable blocks are instruction selected.
61  PM.add(createUnreachableBlockEliminationPass());
62
63  PM.add(createSparcV8SimpleInstructionSelector(*this));
64
65  // Print machine instructions as they were initially generated.
66  if (PrintMachineCode)
67    PM.add(createMachineFunctionPrinterPass(&std::cerr));
68
69  PM.add(createRegisterAllocator());
70  PM.add(createPrologEpilogCodeInserter());
71
72  // Print machine instructions after register allocation and prolog/epilog
73  // insertion.
74  if (PrintMachineCode)
75    PM.add(createMachineFunctionPrinterPass(&std::cerr));
76
77  PM.add(createSparcV8FPMoverPass(*this));
78  PM.add(createSparcV8DelaySlotFillerPass(*this));
79
80  // Print machine instructions after filling delay slots.
81  if (PrintMachineCode)
82    PM.add(createMachineFunctionPrinterPass(&std::cerr));
83
84  // Output assembly language.
85  PM.add(createSparcV8CodePrinterPass(Out, *this));
86
87  // Delete the MachineInstrs we generated, since they're no longer needed.
88  PM.add(createMachineCodeDeleter());
89  return false;
90}
91
92/// addPassesToJITCompile - Add passes to the specified pass manager to
93/// implement a fast dynamic compiler for this target.
94///
95void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
96  // FIXME: Implement efficient support for garbage collection intrinsics.
97  PM.add(createLowerGCPass());
98
99  // Replace malloc and free instructions with library calls.
100  PM.add(createLowerAllocationsPass());
101
102  // FIXME: implement the select instruction in the instruction selector.
103  PM.add(createLowerSelectPass());
104
105  // FIXME: implement the switch instruction in the instruction selector.
106  PM.add(createLowerSwitchPass());
107
108  // FIXME: implement the invoke/unwind instructions!
109  PM.add(createLowerInvokePass());
110
111  PM.add(createLowerConstantExpressionsPass());
112
113  // Make sure that no unreachable blocks are instruction selected.
114  PM.add(createUnreachableBlockEliminationPass());
115
116  PM.add(createSparcV8SimpleInstructionSelector(TM));
117
118  // Print machine instructions as they were initially generated.
119  if (PrintMachineCode)
120    PM.add(createMachineFunctionPrinterPass(&std::cerr));
121
122  PM.add(createRegisterAllocator());
123  PM.add(createPrologEpilogCodeInserter());
124
125  // Print machine instructions after register allocation and prolog/epilog
126  // insertion.
127  if (PrintMachineCode)
128    PM.add(createMachineFunctionPrinterPass(&std::cerr));
129
130  PM.add(createSparcV8FPMoverPass(TM));
131  PM.add(createSparcV8DelaySlotFillerPass(TM));
132
133  // Print machine instructions after filling delay slots.
134  if (PrintMachineCode)
135    PM.add(createMachineFunctionPrinterPass(&std::cerr));
136}
137