SparcTargetMachine.cpp revision b3c77152c85c0ec67afcf77a096008706498d4f6
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include "llvm/Support/CommandLine.h" 24#include <iostream> 25using namespace llvm; 26 27namespace { 28 // Register the target. 29 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 30 31 cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden, 32 cl::desc("Enable DAG-to-DAG isel for V8"), 33 cl::init(0)); 34} 35 36/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 37/// 38SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 39 IntrinsicLowering *IL, 40 const std::string &FS) 41 : TargetMachine("SparcV8", IL, false, 4, 4), 42 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { 43} 44 45unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 46 std::string TT = M.getTargetTriple(); 47 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 48 return 20; 49 50 if (M.getEndianness() == Module::BigEndian && 51 M.getPointerSize() == Module::Pointer32) 52#ifdef __sparc__ 53 return 20; // BE/32 ==> Prefer sparcv8 on sparc 54#else 55 return 5; // BE/32 ==> Prefer ppc elsewhere 56#endif 57 else if (M.getEndianness() != Module::AnyEndianness || 58 M.getPointerSize() != Module::AnyPointerSize) 59 return 0; // Match for some other target 60 61 return 0; 62} 63 64/// addPassesToEmitFile - Add passes to the specified pass manager 65/// to implement a static compiler for this target. 66/// 67bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 68 std::ostream &Out, 69 CodeGenFileType FileType, 70 bool Fast) { 71 if (FileType != TargetMachine::AssemblyFile) return true; 72 73 // FIXME: Implement efficient support for garbage collection intrinsics. 74 PM.add(createLowerGCPass()); 75 76 // Make sure that no unreachable blocks are instruction selected. 77 PM.add(createUnreachableBlockEliminationPass()); 78 79 // FIXME: implement the invoke/unwind instructions! 80 PM.add(createLowerInvokePass()); 81 82 // FIXME: implement the switch instruction in the instruction selector. 83 PM.add(createLowerSwitchPass()); 84 85 // Print LLVM code input to instruction selector: 86 if (PrintMachineCode) 87 PM.add(new PrintFunctionPass()); 88 89 if (!EnableV8DAGDAG) { 90 // Replace malloc and free instructions with library calls. 91 PM.add(createLowerAllocationsPass()); 92 PM.add(createLowerSelectPass()); 93 PM.add(createSparcV8SimpleInstructionSelector(*this)); 94 } else 95 PM.add(createSparcV8ISelDag(*this)); 96 97 // Print machine instructions as they were initially generated. 98 if (PrintMachineCode) 99 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 100 101 PM.add(createRegisterAllocator()); 102 PM.add(createPrologEpilogCodeInserter()); 103 104 // Print machine instructions after register allocation and prolog/epilog 105 // insertion. 106 if (PrintMachineCode) 107 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 108 109 PM.add(createSparcV8FPMoverPass(*this)); 110 111 PM.add(createSparcV8DelaySlotFillerPass(*this)); 112 113 // Print machine instructions after filling delay slots. 114 if (PrintMachineCode) 115 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 116 117 // Output assembly language. 118 PM.add(createSparcV8CodePrinterPass(Out, *this)); 119 120 // Delete the MachineInstrs we generated, since they're no longer needed. 121 PM.add(createMachineCodeDeleter()); 122 return false; 123} 124 125