dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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102f231863034e18863333bf850f8037b46e6947 |
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01-Dec-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Merged r195973: ------------------------------------------------------------------------ r195973 | dsanders | 2013-11-30 13:47:57 +0000 (Sat, 30 Nov 2013) | 5 lines [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s when the stack frame is between 512 and 32,768 bytes in size. ------------------------------------------------------------------------ Review of this commit by Matheus Almeida revealed that it is still possible to emit invalid code (when the offset is not a multiple of the element size). However, we agreed that this commit still represents an improvement since it fixes many cases that previously emitted invalid code, and does not cause any cases that previously emitted valid code to emit invalid code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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ff4b604f961aa9b9ec2f05a5c31885b19fa636e4 |
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01-Dec-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Merged r195972: ------------------------------------------------------------------------ r195972 | dsanders | 2013-11-30 13:15:21 +0000 (Sat, 30 Nov 2013) | 5 lines [mips][msa] A small refactor to reduce patch noise in my next commit No functional change. An if-statement has been split into two nested if-statements. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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1858786285139b87961d9ca08de91dcd59364afb |
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07-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Rename register classes CPURegs and CPU64Regs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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41e632d9e1a55d36cb08b0551ad82a13d9137a5e |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because the internals of TargetMachine could change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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5114226c1896f250be8881adf67d55a7e54b50fc |
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29-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Define a function which returns the GPR register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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700ed80d3da5e98e05ceb90e9bfb66058581a6db |
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21-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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544cc21cf4807116251a699d8b1d3d4bace21597 |
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30-Jan-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Lower EH_RETURN. Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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0b8c9a80f20772c3793201ab5b251d3520b9cea3 |
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02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move all of the header files which are involved in modelling the LLVM IR into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
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03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib. Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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11a45c214c26bdc49ef58c0eb214df5200867cee |
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03-Nov-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Stop reserving register AT and use register scavenger when a scratch register is needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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173192fa71a45ee87479c0eb7753bf116bce36b8 |
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02-Nov-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive "set .noat" so that the assembler doesn't issue warnings when register $AT is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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c878f3899c01db796d72bab8ac5156c124eb30ca |
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26-Sep-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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fc4eafa0f490bd06d8191a2f007514b9e3ce0387 |
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23-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Make function loadImmediate a member of MipsSEInstrInfo and change it to return the temporary register that was used to load the immediate. Currently, it always returns register $at, but this will change if, in the future, we decide to use another register. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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91a35f03da446009cd1de4cdabaa1cdec7e74e0c |
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23-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Add a member of type Mips16InstrInfo/MipsSEInstrInfo to class Mips16RegisterInfo/MipsSERegisterInfo. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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fa566d02cce05cf8ca8d334a67e5534b379eaa3d |
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01-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Remove unused variable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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71746220d3d1c3e8efba35038ac2ff14b4a4d3ae |
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01-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emits instructions that decrement and increment the stack pointer before and after a call when the function does not have a reserved call frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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8589010e3d1d5a902992a5039cffa9d4116982c5 |
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01-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and MipsSERegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
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