Searched defs:regs (Results 1 - 21 of 21) sorted by relevance

/hardware/invensense/60xx/mlsdk/mllite/
H A DmlSetGyroBias.c52 void inv_convert_bias(const unsigned char *regs, short *bias) argument
65 biasTmp2[i] = inv_big8_to_int32(&regs[i * 4]);
H A DmlBiasNoMotion.c80 unsigned char regs[3] = { 0x0d, DINA35, 0x5d }; local
82 result = inv_set_mpu_memory(KEY_CFG_MOTION_BIAS, 3, regs);
91 unsigned char regs[3] = { DINA90 + 8, DINA90 + 8, DINA90 + 8 }; local
93 result = inv_set_mpu_memory(KEY_CFG_MOTION_BIAS, 3, regs);
102 unsigned char regs[12]; local
108 regs[0] = DINAA0 + 3;
109 result = inv_set_mpu_memory(KEY_FCFG_6, 1, regs);
115 result = inv_get_mpu_memory(KEY_D_1_244, 12, regs);
121 inv_convert_bias(regs, bias);
123 regs[
224 unsigned char regs[3] = { 0 }; local
[all...]
H A Dmlcontrol.c118 unsigned char regs[2]; local
129 regs[0] = (unsigned char)(finalSens / 256);
130 regs[1] = (unsigned char)(finalSens % 256);
133 result = inv_set_mpu_memory(KEY_D_0_224, 2, regs);
141 result = inv_set_mpu_memory(KEY_D_0_228, 2, regs);
149 result = inv_set_mpu_memory(KEY_D_0_232, 2, regs);
157 result = inv_set_mpu_memory(KEY_D_0_236, 2, regs);
204 unsigned char regs[8] = { DINA06, DINA26, local
217 regs[i] = DINA80 + 3;
220 result = inv_set_mpu_memory(KEY_CFG_4, 8, regs);
521 unsigned char regs[2] = { DINA80 + 10, DINA20 }; local
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H A Dcompass.c319 unsigned char regs[] = { local
333 ARRAY_SIZE(regs), regs);
336 unsigned char regs[] = { local
342 ARRAY_SIZE(regs), regs);
H A Dmlsupervisor.c521 unsigned char regs[4]; local
525 regs[0] = (unsigned char)((accSF >> 24) & 0xff);
526 regs[1] = (unsigned char)((accSF >> 16) & 0xff);
527 regs[2] = (unsigned char)((accSF >> 8) & 0xff);
528 regs[3] = (unsigned char)(accSF & 0xff);
529 result = inv_set_mpu_memory(KEY_D_0_96, 4, regs);
H A Dmlarray.c2181 unsigned char regs[6]; local
2201 regs[2 * i + 0] = (unsigned char)(biasTmp / 256);
2202 regs[2 * i + 1] = (unsigned char)(biasTmp % 256);
2204 result = inv_set_mpu_memory(KEY_D_1_8, 2, &regs[0]);
2209 result = inv_set_mpu_memory(KEY_D_1_10, 2, &regs[2]);
2214 result = inv_set_mpu_memory(KEY_D_1_2, 2, &regs[4]);
2285 unsigned char regs[3]; local
2296 regs[i] = (unsigned char)sf;
2298 result = inv_set_offsetTC(regs);
H A Dmldl.c685 unsigned char regs[7]; local
695 regs[1 + ii * 2] = (unsigned char)(offset[ii] >> 8) & 0xff;
696 regs[1 + ii * 2 + 1] = (unsigned char)(offset[ii] & 0xff);
700 regs[0] = MPUREG_X_OFFS_USRH;
701 result = inv_serial_write(sMLSLHandle, mldlCfg.addr, 7, regs);
H A Dml.c279 unsigned char regs[4] = { 0 }; local
290 regs[0] = 0;
291 regs[1] = 64;
292 regs[2] = 0;
293 regs[3] = 0;
297 regs[0] = 0;
298 regs[1] = 0;
299 regs[2] = 64;
300 regs[3] = 0;
303 return inv_set_mpu_memory(KEY_D_1_236, 4, regs);
456 unsigned char regs[8]; local
629 unsigned char regs[2] = { 0 }; local
676 unsigned char regs[2] = { 0 }; local
779 unsigned char regs[4] = { 0, 0, 0, 0 }; local
813 unsigned char regs[3]; local
926 unsigned char regs[12] = { 0 }; local
1179 unsigned char regs[4]; local
1333 unsigned char regs[4] = { 0 }; local
1402 unsigned char regs[2] = { 0 }; local
1556 unsigned char regs[27]; local
[all...]
H A DmlFIFO.c226 static inv_error_t inv_construct3_fifo(unsigned char *regs, argument
240 regs[0] = DINAF8 + 2;
247 regs[kk + 1] = DINAA0 + 3;
251 result = inv_set_mpu_memory(key, 4, regs);
262 unsigned char regs = DINA30; local
400 result = inv_set_mpu_memory(KEY_CFG_16, 1, &regs);
410 regs = DINAA0 + 3;
411 result = inv_set_mpu_memory(KEY_CFG_16, 1, &regs);
466 unsigned char regs[4]; local
476 inv_int16_to_big8(delay, regs);
792 unsigned char regs[2]; local
890 unsigned char regs[6]; local
993 unsigned char regs[4] = { DINAF8 + 1, DINA28, DINA30, DINA38 }; local
1029 unsigned char regs[5] = { DINAF8 + 1, DINA20, DINA28, DINA30, DINA38 }; local
1079 unsigned char regs; local
1147 unsigned char regs[4] = { DINAF8 + 1, DINA20, DINA28, DINA30 }; local
1255 unsigned char regs[5] = { DINAF8 + 1, DINA20, DINA28, local
1303 unsigned char regs[7] = { DINAA0 + 3, DINAA0 + 3, DINAA0 + 3, local
1423 unsigned char regs[6] = { DINAA0 + 3, DINAA0 + 3, local
1494 unsigned char regs[5] = { DINAF8 + 1, DINA20, DINA28, local
1553 unsigned char regs[3] = { DINA28, DINA30, DINA38 }; local
1958 unsigned char regs[2]; local
[all...]
/hardware/akm/AK8975_FS/akmdfs/
H A Dmain.c201 uint8 regs[3]; local
233 if (AKFS_ReadAK8975FUSEROM(regs) != AKM_SUCCESS) {
239 if (AKFS_Init(pat, regs) != AKM_SUCCESS) {
/hardware/qcom/msm8960/kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h67 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/qcom/msm8960/original-kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h88 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/qcom/msm8x74/kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h67 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/qcom/msm8x74/original-kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h88 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/qcom/msm8x84/kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h67 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/qcom/msm8x84/original-kernel-headers/linux/mfd/
H A Dmsm-adie-codec.h88 struct adie_codec_register *regs; member in struct:adie_codec_register_image
/hardware/intel/bootstub/
H A Dbootstub.c205 static inline void cpuid(u32 op, u32 regs[4]) argument
211 : "=a"(regs[0]), "=D"(regs[1]), "=c"(regs[2]), "=d"(regs[3])
225 u32 regs[4]; local
227 cpuid(1, regs);
229 switch ( regs[CR_EAX] & CPUID_MASK ) {
/hardware/invensense/60xx/mlsdk/mlutils/
H A Dmputest.c330 unsigned char regs[7]; local
346 regs[0] = 0x03; /* filter = 42Hz, analog_sample rate = 1 KHz */
349 regs[0] |= 0x18;
352 regs[0] |= 0x10;
355 regs[0] |= 0x08;
359 regs[0] |= 0x00;
364 MPUREG_DLPF_FS_SYNC, regs[0]);
580 unsigned char regs[7]; local
596 regs[0] = 0x03; /* filter = 42Hz, analog_sample rate = 1 KHz */
599 regs[
[all...]
/hardware/intel/img/psb_video/src/
H A Dpsb_overlay.c135 struct drm_psb_register_rw_arg regs; local
143 memset(&regs, 0, sizeof(regs));
145 regs.overlay_write_mask |= OV_REGRWBITS_OGAM_ALL | OVC_REGRWBITS_OGAM_ALL;
147 regs.overlay_write_mask |= OV_REGRWBITS_OGAM_ALL;
148 regs.overlay.OGAMC0 = gamma0;
149 regs.overlay.OGAMC1 = gamma1;
150 regs.overlay.OGAMC2 = gamma2;
151 regs.overlay.OGAMC3 = gamma3;
152 regs
164 struct drm_psb_register_rw_arg regs; local
427 struct drm_psb_register_rw_arg regs; local
1378 struct drm_psb_register_rw_arg regs; local
1418 struct drm_psb_register_rw_arg regs; local
[all...]
/hardware/intel/img/psb_video/src/x11/
H A Dpsb_coverlay.c825 struct drm_psb_register_rw_arg regs; local
834 memset(&regs, 0, sizeof(regs));
835 regs.subpicture_enable_mask = subpicture_enable_mask;
838 drmCommandWriteRead(driver_data->drm_fd, DRM_PSB_REGISTER_RW, &regs, sizeof(regs));
/hardware/samsung_slsi/exynos5/original-kernel-headers/linux/
H A Dfimg2d.h423 * @regs: base address of hardware
440 void __iomem *regs; member in struct:fimg2d_control

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