Searched refs:CP0TCSt_TCU2 (Results 1 - 3 of 3) sorted by relevance

/external/qemu/target-mips/
H A Dcpu.h157 #define CP0TCSt_TCU2 30 macro
H A Dtranslate_init.c280 .CP0_TCStatus_rw_bitmask = (0 << CP0TCSt_TCU3) | (0 << CP0TCSt_TCU2) |
H A Dop_helper.c695 | (1 << CP0TCSt_TCU2)

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