/art/runtime/base/unix_file/ |
H A D | random_access_file_utils_test.cc | 28 StringFile dst; local 33 ASSERT_EQ(dst.ToStringPiece(), ""); 35 ASSERT_TRUE(CopyFile(src, &dst)); 36 ASSERT_EQ(src.ToStringPiece(), dst.ToStringPiece()); 41 StringFile dst; local 42 ASSERT_FALSE(CopyFile(src, &dst)); 47 FdFile dst(-1, false); 53 ASSERT_FALSE(CopyFile(src, &dst));
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H A D | random_access_file_utils.h | 24 // Copies from 'src' to 'dst'. Reads all the data from 'src', and writes it 25 // to 'dst'. Not thread-safe. Neither file will be closed. 26 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst);
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H A D | random_access_file_utils.cc | 23 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst) { argument 30 if (dst->Write(&buf[0], n, offset) != n) {
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H A D | mapped_file_test.cc | 38 FdFile dst(fd, false); 43 ASSERT_TRUE(CopyFile(src, &dst)); 44 ASSERT_EQ(dst.FlushClose(), 0);
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/art/runtime/base/ |
H A D | stringprintf.h | 29 // Appends a printf-like formatting of the arguments to 'dst'. 30 void StringAppendF(std::string* dst, const char* fmt, ...) 33 // Appends a printf-like formatting of the arguments to 'dst'. 34 void StringAppendV(std::string* dst, const char* format, va_list ap);
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H A D | stringprintf.cc | 23 void StringAppendV(std::string* dst, const char* format, va_list ap) { argument 38 dst->append(space, result); 60 dst->append(buf, result); 74 void StringAppendF(std::string* dst, const char* format, ...) { argument 77 StringAppendV(dst, format, ap);
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/art/runtime/ |
H A D | reflection-inl.h | 32 const JValue& src, JValue* dst) { 35 dst->SetJ(src.GetJ()); 46 dst->SetS(src.GetI()); 53 dst->SetI(src.GetI()); 60 dst->SetJ(src.GetI()); 67 dst->SetF(src.GetI()); 70 dst->SetF(src.GetJ()); 77 dst->SetD(src.GetI()); 80 dst->SetD(src.GetJ()); 83 dst 30 ConvertPrimitiveValue(const ThrowLocation* throw_location, bool unbox_for_result, Primitive::Type srcType, Primitive::Type dstType, const JValue& src, JValue* dst) argument [all...] |
H A D | monitor_android.cc | 37 static char* EventLogWriteInt(char* dst, int value) { argument 38 *dst++ = EVENT_TYPE_INT; 39 Set4LE(reinterpret_cast<uint8_t*>(dst), value); 40 return dst + 4; 43 static char* EventLogWriteString(char* dst, const char* value, size_t len) { argument 44 *dst++ = EVENT_TYPE_STRING; 46 Set4LE(reinterpret_cast<uint8_t*>(dst), len); 47 dst += 4; 48 memcpy(dst, value, len); 49 return dst [all...] |
H A D | dex_file_verifier_test.cc | 94 std::unique_ptr<byte[]> dst(new byte[tmp.size()]); 100 std::copy(tmp.begin(), tmp.end(), dst.get()); 101 return dst.release();
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H A D | reflection.h | 47 const JValue& src, JValue* dst)
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H A D | dex_file_test.cc | 99 std::unique_ptr<byte[]> dst(new byte[tmp.size()]); 105 std::copy(tmp.begin(), tmp.end(), dst.get()); 106 return dst.release();
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 105 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { argument 109 EmitRex64(dst); 111 EmitRegisterOperand(0, dst.LowBits()); 114 EmitRex64(dst); 115 EmitUint8(0xB8 + dst.LowBits()); 121 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { argument 123 EmitOptionalRex32(dst); 124 EmitUint8(0xB8 + dst.LowBits()); 129 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { argument 132 EmitRex64(src, dst); 138 movl(CpuRegister dst, CpuRegister src) argument 146 movq(CpuRegister dst, const Address& src) argument 154 movl(CpuRegister dst, const Address& src) argument 162 movq(const Address& dst, CpuRegister src) argument 170 movl(const Address& dst, CpuRegister src) argument 177 movl(const Address& dst, const Immediate& imm) argument 185 movzxb(CpuRegister dst, CpuRegister src) argument 194 movzxb(CpuRegister dst, const Address& src) argument 203 movsxb(CpuRegister dst, CpuRegister src) argument 212 movsxb(CpuRegister dst, const Address& src) argument 226 movb(const Address& dst, CpuRegister src) argument 234 movb(const Address& dst, const Immediate& imm) argument 243 movzxw(CpuRegister dst, CpuRegister src) argument 252 movzxw(CpuRegister dst, const Address& src) argument 261 movsxw(CpuRegister dst, CpuRegister src) argument 270 movsxw(CpuRegister dst, const Address& src) argument 284 movw(const Address& dst, CpuRegister src) argument 293 leaq(CpuRegister dst, const Address& src) argument 301 movss(XmmRegister dst, const Address& src) argument 311 movss(const Address& dst, XmmRegister src) argument 321 movss(XmmRegister dst, XmmRegister src) argument 331 movd(XmmRegister dst, CpuRegister src) argument 341 movd(CpuRegister dst, XmmRegister src) argument 351 addss(XmmRegister dst, XmmRegister src) argument 361 addss(XmmRegister dst, const Address& src) argument 371 subss(XmmRegister dst, XmmRegister src) argument 381 subss(XmmRegister dst, const Address& src) argument 391 mulss(XmmRegister dst, XmmRegister src) argument 401 mulss(XmmRegister dst, const Address& src) argument 411 divss(XmmRegister dst, XmmRegister src) argument 421 divss(XmmRegister dst, const Address& src) argument 438 fstps(const Address& dst) argument 445 movsd(XmmRegister dst, const Address& src) argument 455 movsd(const Address& dst, XmmRegister src) argument 465 movsd(XmmRegister dst, XmmRegister src) argument 475 addsd(XmmRegister dst, XmmRegister src) argument 485 addsd(XmmRegister dst, const Address& src) argument 495 subsd(XmmRegister dst, XmmRegister src) argument 505 subsd(XmmRegister dst, const Address& src) argument 515 mulsd(XmmRegister dst, XmmRegister src) argument 525 mulsd(XmmRegister dst, const Address& src) argument 535 divsd(XmmRegister dst, XmmRegister src) argument 545 divsd(XmmRegister dst, const Address& src) argument 555 cvtsi2ss(XmmRegister dst, CpuRegister src) argument 565 cvtsi2sd(XmmRegister dst, CpuRegister src) argument 575 cvtss2si(CpuRegister dst, XmmRegister src) argument 585 cvtss2sd(XmmRegister dst, XmmRegister src) argument 595 cvtsd2si(CpuRegister dst, XmmRegister src) argument 605 cvttss2si(CpuRegister dst, XmmRegister src) argument 615 cvttsd2si(CpuRegister dst, XmmRegister src) argument 625 cvtsd2ss(XmmRegister dst, XmmRegister src) argument 635 cvtdq2pd(XmmRegister dst, XmmRegister src) argument 664 sqrtsd(XmmRegister dst, XmmRegister src) argument 674 sqrtss(XmmRegister dst, XmmRegister src) argument 684 xorpd(XmmRegister dst, const Address& src) argument 694 xorpd(XmmRegister dst, XmmRegister src) argument 704 xorps(XmmRegister dst, const Address& src) argument 713 xorps(XmmRegister dst, XmmRegister src) argument 722 andpd(XmmRegister dst, const Address& src) argument 739 fstpl(const Address& dst) argument 746 fnstcw(const Address& dst) argument 760 fistpl(const Address& dst) argument 767 fistps(const Address& dst) argument 817 xchgl(CpuRegister dst, CpuRegister src) argument 825 xchgq(CpuRegister dst, CpuRegister src) argument 888 addl(CpuRegister dst, CpuRegister src) argument 961 andl(CpuRegister dst, CpuRegister src) argument 969 andl(CpuRegister dst, const Immediate& imm) argument 984 orl(CpuRegister dst, CpuRegister src) argument 992 orl(CpuRegister dst, const Immediate& imm) argument 999 xorl(CpuRegister dst, CpuRegister src) argument 1007 xorq(CpuRegister dst, CpuRegister src) argument 1015 xorq(CpuRegister dst, const Immediate& imm) argument 1090 addq(CpuRegister dst, const Address& address) argument 1098 addq(CpuRegister dst, CpuRegister src) argument 1122 subl(CpuRegister dst, CpuRegister src) argument 1145 subq(CpuRegister dst, CpuRegister src) argument 1183 imull(CpuRegister dst, CpuRegister src) argument 1444 setcc(Condition condition, CpuRegister dst) argument 1456 LoadDoubleConstant(XmmRegister dst, double value) argument 1642 EmitOptionalRex32(CpuRegister dst, CpuRegister src) argument 1646 EmitOptionalRex32(XmmRegister dst, XmmRegister src) argument 1650 EmitOptionalRex32(CpuRegister dst, XmmRegister src) argument 1654 EmitOptionalRex32(XmmRegister dst, CpuRegister src) argument 1665 EmitOptionalRex32(CpuRegister dst, const Operand& operand) argument 1675 EmitOptionalRex32(XmmRegister dst, const Operand& operand) argument 1689 EmitRex64(CpuRegister dst, CpuRegister src) argument 1693 EmitRex64(CpuRegister dst, const Operand& operand) argument 1703 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) argument 1707 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) argument [all...] |
H A D | assembler_x86_64.h | 273 void movq(CpuRegister dst, const Immediate& src); 274 void movl(CpuRegister dst, const Immediate& src); 275 void movq(CpuRegister dst, CpuRegister src); 276 void movl(CpuRegister dst, CpuRegister src); 278 void movq(CpuRegister dst, const Address& src); 279 void movl(CpuRegister dst, const Address& src); 280 void movq(const Address& dst, CpuRegister src); 281 void movl(const Address& dst, CpuRegister src); 282 void movl(const Address& dst, const Immediate& imm); 284 void movzxb(CpuRegister dst, CpuRegiste [all...] |
/art/compiler/utils/x86/ |
H A D | assembler_x86.h | 232 void movl(Register dst, const Immediate& src); 233 void movl(Register dst, Register src); 235 void movl(Register dst, const Address& src); 236 void movl(const Address& dst, Register src); 237 void movl(const Address& dst, const Immediate& imm); 238 void movl(const Address& dst, Label* lbl); 240 void movzxb(Register dst, ByteRegister src); 241 void movzxb(Register dst, const Address& src); 242 void movsxb(Register dst, ByteRegister src); 243 void movsxb(Register dst, cons [all...] |
H A D | assembler_x86.cc | 105 void X86Assembler::movl(Register dst, const Immediate& imm) { argument 107 EmitUint8(0xB8 + dst); 112 void X86Assembler::movl(Register dst, Register src) { argument 115 EmitRegisterOperand(src, dst); 119 void X86Assembler::movl(Register dst, const Address& src) { argument 122 EmitOperand(dst, src); 126 void X86Assembler::movl(const Address& dst, Register src) { argument 129 EmitOperand(src, dst); 133 void X86Assembler::movl(const Address& dst, const Immediate& imm) { argument 136 EmitOperand(0, dst); 140 movl(const Address& dst, Label* lbl) argument 147 movzxb(Register dst, ByteRegister src) argument 155 movzxb(Register dst, const Address& src) argument 163 movsxb(Register dst, ByteRegister src) argument 171 movsxb(Register dst, const Address& src) argument 184 movb(const Address& dst, ByteRegister src) argument 191 movb(const Address& dst, const Immediate& imm) argument 200 movzxw(Register dst, Register src) argument 208 movzxw(Register dst, const Address& src) argument 216 movsxw(Register dst, Register src) argument 224 movsxw(Register dst, const Address& src) argument 237 movw(const Address& dst, Register src) argument 245 leal(Register dst, const Address& src) argument 252 cmovl(Condition condition, Register dst, Register src) argument 260 setb(Condition condition, Register dst) argument 268 movss(XmmRegister dst, const Address& src) argument 277 movss(const Address& dst, XmmRegister src) argument 286 movss(XmmRegister dst, XmmRegister src) argument 295 movd(XmmRegister dst, Register src) argument 304 movd(Register dst, XmmRegister src) argument 313 addss(XmmRegister dst, XmmRegister src) argument 322 addss(XmmRegister dst, const Address& src) argument 331 subss(XmmRegister dst, XmmRegister src) argument 340 subss(XmmRegister dst, const Address& src) argument 349 mulss(XmmRegister dst, XmmRegister src) argument 358 mulss(XmmRegister dst, const Address& src) argument 367 divss(XmmRegister dst, XmmRegister src) argument 376 divss(XmmRegister dst, const Address& src) argument 392 fstps(const Address& dst) argument 399 movsd(XmmRegister dst, const Address& src) argument 408 movsd(const Address& dst, XmmRegister src) argument 417 movsd(XmmRegister dst, XmmRegister src) argument 426 addsd(XmmRegister dst, XmmRegister src) argument 435 addsd(XmmRegister dst, const Address& src) argument 444 subsd(XmmRegister dst, XmmRegister src) argument 453 subsd(XmmRegister dst, const Address& src) argument 462 mulsd(XmmRegister dst, XmmRegister src) argument 471 mulsd(XmmRegister dst, const Address& src) argument 480 divsd(XmmRegister dst, XmmRegister src) argument 489 divsd(XmmRegister dst, const Address& src) argument 498 cvtsi2ss(XmmRegister dst, Register src) argument 507 cvtsi2sd(XmmRegister dst, Register src) argument 516 cvtss2si(Register dst, XmmRegister src) argument 525 cvtss2sd(XmmRegister dst, XmmRegister src) argument 534 cvtsd2si(Register dst, XmmRegister src) argument 543 cvttss2si(Register dst, XmmRegister src) argument 552 cvttsd2si(Register dst, XmmRegister src) argument 561 cvtsd2ss(XmmRegister dst, XmmRegister src) argument 570 cvtdq2pd(XmmRegister dst, XmmRegister src) argument 596 sqrtsd(XmmRegister dst, XmmRegister src) argument 605 sqrtss(XmmRegister dst, XmmRegister src) argument 614 xorpd(XmmRegister dst, const Address& src) argument 623 xorpd(XmmRegister dst, XmmRegister src) argument 632 xorps(XmmRegister dst, const Address& src) argument 640 xorps(XmmRegister dst, XmmRegister src) argument 648 andpd(XmmRegister dst, const Address& src) argument 664 fstpl(const Address& dst) argument 671 fnstcw(const Address& dst) argument 685 fistpl(const Address& dst) argument 692 fistps(const Address& dst) argument 742 xchgl(Register dst, Register src) argument 775 addl(Register dst, Register src) argument 841 andl(Register dst, Register src) argument 848 andl(Register dst, const Immediate& imm) argument 854 orl(Register dst, Register src) argument 861 orl(Register dst, const Immediate& imm) argument 867 xorl(Register dst, Register src) argument 873 xorl(Register dst, const Immediate& imm) argument 903 adcl(Register dst, Register src) argument 910 adcl(Register dst, const Address& address) argument 917 subl(Register dst, Register src) argument 950 imull(Register dst, Register src) argument 1002 sbbl(Register dst, Register src) argument 1015 sbbl(Register dst, const Address& address) argument 1078 shld(Register dst, Register src) argument 1260 LoadDoubleConstant(XmmRegister dst, double value) argument [all...] |
/art/runtime/jdwp/ |
H A D | jdwp_bits.h | 100 static inline void Write1BE(uint8_t** dst, uint8_t value) { argument 101 Set1(*dst, value); 102 *dst += sizeof(value); 105 static inline void Write2BE(uint8_t** dst, uint16_t value) { argument 106 Set2BE(*dst, value); 107 *dst += sizeof(value); 110 static inline void Write4BE(uint8_t** dst, uint32_t value) { argument 111 Set4BE(*dst, value); 112 *dst += sizeof(value); 115 static inline void Write8BE(uint8_t** dst, uint64_ argument [all...] |
/art/compiler/utils/arm/ |
H A D | assembler_arm.cc | 505 ArmManagedRegister dst = mdest.AsArm(); 506 CHECK(dst.IsCoreRegister() && dst.IsCoreRegister()) << dst; 507 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 510 rsb(dst.AsCoreRegister(), dst.AsCoreRegister(), ShifterOperand(0)); 515 ArmManagedRegister dst = mdest.AsArm(); 516 CHECK(dst.IsCoreRegister()) << dst; [all...] |
/art/test/201-built-in-exception-detail-messages/src/ |
H A D | Main.java | 136 Integer[] dst = new Integer[10]; 137 System.arraycopy(src, 1, dst, 0, 5); 145 int[] dst = new int[1]; 146 System.arraycopy(src, 0, dst, 0, 1); 148 assertEquals("Incompatible types: src=java.lang.String[], dst=int[]", ex.getMessage()); 153 Runnable[] dst = new Runnable[1]; 154 System.arraycopy(src, 0, dst, 0, 1); 156 assertEquals("Incompatible types: src=float[], dst=java.lang.Runnable[]", ex.getMessage()); 161 double[][] dst = new double[1][]; 162 System.arraycopy(src, 0, dst, [all...] |
/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 288 Arm64ManagedRegister dst = m_dst.AsArm64(); local 289 CHECK(dst.IsCoreRegister()) << dst; 290 LoadWFromOffset(kLoadWord, dst.AsOverlappingCoreRegisterLow(), SP, offs.Int32Value()); 295 Arm64ManagedRegister dst = m_dst.AsArm64(); local 297 CHECK(dst.IsCoreRegister() && base.IsCoreRegister()); 298 LoadWFromOffset(kLoadWord, dst.AsOverlappingCoreRegisterLow(), base.AsCoreRegister(), 303 Arm64ManagedRegister dst = m_dst.AsArm64(); local 305 CHECK(dst.IsCoreRegister() && base.IsCoreRegister()); 306 // Remove dst an 313 Arm64ManagedRegister dst = m_dst.AsArm64(); local 320 Arm64ManagedRegister dst = m_dst.AsArm64(); local [all...] |
H A D | assembler_arm64.h | 176 // src holds a handle scope entry (Object**) load this into dst. 177 void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE; 229 void Load(Arm64ManagedRegister dst, Register src, int32_t src_offset, size_t size);
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 459 MipsManagedRegister dst = m_dst.AsMips(); local 460 if (dst.IsNoRegister()) { 461 CHECK_EQ(0u, size) << dst; 462 } else if (dst.IsCoreRegister()) { 463 CHECK_EQ(4u, size) << dst; 464 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 465 } else if (dst.IsRegisterPair()) { 466 CHECK_EQ(8u, size) << dst; 467 LoadFromOffset(kLoadWord, dst.AsRegisterPairLow(), src_register, src_offset); 468 LoadFromOffset(kLoadWord, dst [all...] |
/art/compiler/ |
H A D | image_writer.h | 150 byte* dst = image_->Begin() + offset; local 151 return reinterpret_cast<mirror::Object*>(dst);
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/art/compiler/optimizing/ |
H A D | code_generator_x86.h | 78 void MoveMemoryToMemory(int dst, int src);
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/art/runtime/native/ |
H A D | dalvik_system_DexFile.cc | 263 ScopedFd dst(open(newfile, O_WRONLY|O_CREAT|O_TRUNC, 0600)); 264 if (dst.get() == -1) { 271 if (sendfile(dst.get(), src.get(), nullptr, stat_src.st_size) == -1) { 274 if (sendfile(dst.get(), src.get(), 0, &len, nullptr, 0) == -1) {
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/art/runtime/verifier/ |
H A D | register_line.h | 295 void CopyRegToLockDepth(size_t dst, size_t src) { 298 reg_to_lock_depths_.Put(dst, it->second);
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