| cc44aa77490e1360b099eb0b887266f434298b4f |
|
21-Jul-2012 |
Eric Anholt <eric@anholt.net> |
i965: Remove unused param conversion code.
Ever since ctx->NativeIntegers was set, the conversion flag has been
PARAM_NO_CONVERT.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 0969568fce93bde927797ed4eeae0df6546806a3 |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen4: Move CURBE offset calculation to emit() time.
This is consumed by the unit state.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 47c4d950cbc62f004ecdfe2eb197eb8a440cf1ae |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen4: Fold push constant prepare()/emit() together.
While other units need to know about our constant buffer offsets,
nothing else cared about which particular BO other than the emit() half.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| eaf4d3e6e2493a6e0b20d1205a5fb33ce500c9c2 |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Remove the validated BO list, now that it's unused.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| c163072197b56e76b656cc472bbe6df650cf11ba |
|
28-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
mesa: Create _mesa_bitcount_64() to replace i965's brw_count_bits()
The i965 driver already had a function to count bits in a 64-bit uint
(brw_count_bits()), but it was buggy (it only counted the bottom 32
bits) and it was clumsy (it had a strange and broken fallback for
non-GCC-like compilers, which fortunately was never used). Since Mesa
already has a _mesa_bitcount() function, it seems better to just
create a _mesa_bitcount_64() function rather than special-case this in
the i965 driver.
This patch creates the new _mesa_bitcount_64() function and rewrites
all of the old brw_count_bits() calls to refer to it.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| d912669034eb7bf5c162358a7a574ec7a4c963c7 |
|
26-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965 Gen6: Implement gl_ClipVertex.
This patch implements proper support for gl_ClipVertex by causing the
new VS backend to populate the clip distance VUE slots using
VERT_RESULT_CLIP_VERTEX when appropriate, and by using the
untransformed clip planes in ctx->Transform.EyeUserPlane rather than
the transformed clip planes in ctx->Transform._ClipUserPlane when a
GLSL-based vertex shader is in use.
When not using a GLSL-based vertex shader, we use
ctx->Transform._ClipUserPlane (which is what we used prior to this
patch). This ensures that clipping is still performed correctly for
fixed function and ARB vertex programs. A new function,
brw_select_clip_planes() is used to determine whether to use
_ClipUserPlane or EyeUserPlane, so that the logic for making this
decision is shared between the new and old vertex shaders.
Fixes the following Piglit tests on i965 Gen6:
- vs-clip-vertex-const-accept
- vs-clip-vertex-const-reject
- vs-clip-vertex-different-from-position
- vs-clip-vertex-equal-to-position
- vs-clip-vertex-homogeneity
- vs-clip-based-on-position
- vs-clip-based-on-position-homogeneity
- clip-plane-transformation clipvert_pos
- clip-plane-transformation pos_clipvert
- clip-plane-transformation pos
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| e7da40afe84349a640fe15e3af408a0dfe880e85 |
|
24-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965 new VS: don't share clip plane constants in pre-GEN6
In pre-GEN6, when using clip planes, both the vertex shader and the
clipper need access to the client-supplied clip planes, since the
vertex shader needs them to set the clip flags, and the clipper needs
them to determine where to insert new vertices.
With the old VS backend, we used a clever optimization to avoid
placing duplicate copies of these planes in the CURBE: we used the
same block of memory for both the clipper and vertex shader constants,
with the clip planes at the front of it, and then we instructed the
clipper to read just the initial part of this block containing the
clip planes.
This optimization was tricky, of dubious value, and not completely
working in the new VS backend, so I've removed it. Now, when using
the new VS backend, separate parts of the CURBE are used for the
clipper and the vertex shader. Note that this doesn't affect the
number of push constants available to the vertex shader, it simply
causes the CURBE to occupy a few more bytes of URB memory.
The old VS backend is unaffected. GEN6+, which does clipping entirely
in hardware, is also unaffected.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 8be653164d7c64d8e463c5e95ed6b65d6eba3dcf |
|
14-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: Remove bogus assertion on MAX_CLIP_PLANES.
This patch removes the assertion "MAX_CLIP_PLANES == 6" from the i965
driver. This assertion is unnecessary; nothing in the driver requires
MAX_CLIP_PLANES to be 6.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 55b7fbb70ffc1f4def5c3ded63c3ef569e693731 |
|
19-Aug-2011 |
Eric Anholt <eric@anholt.net> |
i965: Use native integer uniforms when the new VS backend is in use.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| a070d5f363e99b0f846d555e9ca3a74ec807fdc0 |
|
04-May-2011 |
Eric Anholt <eric@anholt.net> |
i965/vs: Start adding support for uniforms
There's no clever packing here, no pull constants, and no array support.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| aac120977d1ead319141d48d65c9bba626ec03b8 |
|
20-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i965: Move repeat-instruction-suppression to batchbuffer core
Move the tracking of the last emitted instructions into the core
batchbuffer routines and take advantage of the shadow batch copy to
avoid extra memory allocations and copies.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 05e534e6c4395269b1ca3a9694a1f437363dd186 |
|
09-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Drop push-mode reladdr constant loading and always use constant_map.
This eases the gen6 implementation, which can only handle up to 32
registers of constants, while likely not penalizing real apps using
reladdr since all of those I've seen also end up hitting the pull
constant buffer. On gen6, the constant map means that simple NV VPs
fit under the 32-reg limit and now succeed. Fixes around 10 testcases.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 9e3641bd0d739a87a6998300ca29580cb557f380 |
|
25-Oct-2010 |
Eric Anholt <eric@anholt.net> |
i965: Make FS uniforms be the actual type of the uniform at upload time.
This fixes some insanity that would otherwise be required for GLSL
1.30 bit ops or gen6 integer uniform operations in general, at the
cost of upload-time pain. Given that we only have that pain because
mesa's mangling our integer uniforms to be floats, this something that
should be fixed outside of the shader codegen.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| ca12aefdacd22fb42e3f1d3852db4c12de886554 |
|
24-Jun-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'shader-file-reorg'
1. Move all GL entrypoint functions and files into src/mesa/main/
This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits
that were in src/mesa/shader/
2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth
3. Rename src/mesa/shader/ to src/mesa/program/ since all the
remaining files are concerned with GPU programs.
4. Misc code refactoring. In particular, I got rid of most of the
GLSL-related ctx->Driver hook functions. None of the drivers used
them.
Conflicts:
src/mesa/drivers/dri/i965/brw_context.c
|
| 34c82804edb1e9b11cf31be2246a9086694d35d6 |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Warning fixes from the i965-streaming merge.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 118a47623a11a374df371d52ed0294224e6a62dc |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Split constant buffer setup from its surface state/binding state.
This was bothering me when redoing the binding tables.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| ec2b92f98c2e7f161521b447cc1d9a36bce3707c |
|
11-Jun-2010 |
Brian Paul <brianp@vmware.com> |
mesa: rename src/mesa/shader/ to src/mesa/program/
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 503eb57a003f51c25687e9cf0ad6f7939a757f1b |
|
08-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Avoid calloc/free in the CURBE upload process.
In exchange we end up with an extra memcpy, but that seems better than
calloc/free. Each buffer is 4k maximum, and on the i965-streaming
branch this allocation was showing up as the top entry in
brw_validate_state profiling for cairo-gl.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support.
Shaves 60k off the driver from removing the broken spans code. This
means we now require 2.6.29, which seems fair given that it's a year
old and we've removed support for non-KMS already in the last release
of 2D.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 298be2b028263b2c343a707662c6fbfa18293cb2 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace the _mesa_*printf() wrappers with the plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 32f2fd1c5d6088692551c80352b7d6fa35b0cd09 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| c8433af711c1ec102bfaded742be964545464a42 |
|
05-Feb-2010 |
Eric Anholt <eric@anholt.net> |
i965: Keep the CURBE BO mapped and memcpy instead of subdataing.
For the tiny bis of data we generally upload through the CURBEs, the
overhead of the kernel's pagetable trickery is actually rather high.
This improves cairo-gl gnome-terminal-vim performance by 3.8%.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 3e498207d1a0e95f143bb04b38ca22faf5f91f5d |
|
05-Feb-2010 |
Eric Anholt <eric@anholt.net> |
i965: Reset the "need new CURBE BO" flag when we make a new CURBE bo.
Improves cairo-gl gnome-terminal-vim times by 11%.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| fb4901593c9495714d3f54920a28c271852e2112 |
|
19-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Upload as many VS constants as possible through the push constants.
The pull constants require sending out to an overworked shared unit
and waiting for a response, while push constants are nicely loaded in
for us at thread dispatch time. By putting things we access in every
VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 99077e77927ec26edf85bfef81a6d433171c3a1e |
|
13-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Flag BRW_NEW_CONTEXT on some context state.
Fixing this is a prereq for avoiding flagging all state at new
batch time. Eliminating that still causes problems, though (notably
glean logicOp fails on my GM965).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 9018a7dd175caa9a0fbf940b7e66aa9411d2d965 |
|
24-Sep-2009 |
Eric Anholt <eric@anholt.net> |
i965: Load NV program matrices when required.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 09549704c6579aae2506891d4e9d1c258eab95db |
|
29-Aug-2009 |
Eric Anholt <eric@anholt.net> |
i965: Support PROGRAM_ENV_PARAMs in brw_vs_emit.c
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 71fb9d62ece0177183efd5bb955d1f3292cb4376 |
|
06-May-2009 |
Eric Anholt <eric@anholt.net> |
i965: Split WM constant buffer update from other WM surfaces.
This can avoid re-uploading constant data when it isn't necessary, and is
a step towards not updating other surfaces just because constants change.
It also brings the upload of the constant buffer next to the creation.
This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 9490d86808300e5819941a40784e272c290e05ee |
|
05-May-2009 |
Eric Anholt <eric@anholt.net> |
i965: Disentangle VS constant surface state from WM surface state.
Also, only create VS surface state if there's a VS constant buffer to be
uploaded, and set the contents of the buffer at the same time as creation.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| b9196c1fa39dd566c5d7ab340e353b77714edb5f |
|
01-May-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'const-buffer-changes'
Conflicts:
src/mesa/drivers/dri/i965/brw_curbe.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_wm_glsl.c
|
| dd4802176f7751e8c38c000687ff9cb9633649aa |
|
27-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: #include prog_print.h to silence warning
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 777b9ff43e88e456d686208c83712f26aba2dd95 |
|
27-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: only upload constant buffer data when we actually need the const buffer
Make the use_const_buffer field per-program and only call the code which
updates the constant buffer's data if the flag is set.
This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052
(cherry picked from master, commit dc9705d12d162ba6d087eb762e315de9f97bc456)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| dc9705d12d162ba6d087eb762e315de9f97bc456 |
|
27-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: only upload constant buffer data when we actually need the const buffer
Make the use_const_buffer field per-program and only call the code which
updates the constant buffer's data if the flag is set.
This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 3321b6984ecd96ba466d8d010e390fff71a799d7 |
|
24-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: use drm_intel_gem_bo_map/unmap_gtt() when possible, otherwise dri_bo_subdata()
This wraps up the unfinished business from commit a9a363f8298e9d534e60e3d2869f8677138a1e7e
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| a9a363f8298e9d534e60e3d2869f8677138a1e7e |
|
24-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: revert part of commit 4f4907d69f9020ce17aef21b6431d2dd65e01982
The drm_intel_gem_bo_map_gtt() call that replaced dri_bo_map() is
producing errors like:
intel_bufmgr_gem.c:689: Error preparing buffer map 39 (vp_const_buffer): Invalid argument .
and returning NULL, causing a segfault in the memcpy().
Just reverting until we can get to the root issue...
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 4f4907d69f9020ce17aef21b6431d2dd65e01982 |
|
23-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Take advantage of GL_READ_ONLY_ARB to map to GEM bo_map write flag.
This is a CPU win in general, but in particular reduces the pain of
Mesa's calculation of min/max indices in DrawElements (wtf?).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 6b6a23c0f7e042d71764a2028f3d33b59076ac7c |
|
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: updates to some debug code
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 817dcdd280cd749c3186bd3f00c06f41270aa884 |
|
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: use new _NEW_PROGRAM_CONSTANTS flag instead of dynamic flags
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| f8f23e33c21f41756d068b546f2aae37030b5773 |
|
16-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: updated CURBE allocation code
Now that we have real constant buffers, the demands on the CURBE are lessened.
When we use real VS/WM constant buffers we only use the CURBE for clip planes.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| fc76781456182f487fc7e0057ca8a4c648dfe530 |
|
16-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: const buffer debug code (disabled)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| cafea7528052624c8d3e4cd1c5b26a61bf04d1d0 |
|
14-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: checkpoint commit: VS constant buffers
Hook up a constant buffer, binding table, etc for the VS unit.
This will allow using large constant buffers with vertex shaders.
The new code is disabled at this time (use_const_buffer=FALSE).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 23a911b4a66914883ece70c1e621dfc082661a28 |
|
10-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: added null const_buffer pointer check in update_constant_buffer()
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 20f3497e4b6756e330f7b3f54e8acaa1d6c92052 |
|
10-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: re-org of some of the new constant buffer code
Plus, begin the new code for vertex shader const buffers.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| cbd305394a7a01e12f4a42b2551a154b4d544fe2 |
|
03-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: remove unused var
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 597cd5b94e4818679af1134d053541f3d2cfb80e |
|
01-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: check-point commit of new constant buffer support
Currently, shader constants are stored in the GRF (loaded from the CURBE
prior to shader execution). This severly limits the number of constants
and temps that we can support.
This new code will support (practically) unlimited size constant buffers
and free up registers in the GRF. We allocate a new buffer object for the
constants and read them with "Read" messages/instructions. When only a
small number of constants are used, we can still use the old method.
The code works for fragment shaders only (and is actually disabled) for now.
Need to do the same thing for vertex shaders and need to add the necessary
code-gen to fetch the constants which are referenced by the shader
instructions.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| dbc9a1d33b5b047a6497d47cda224df6da200302 |
|
13-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i965: fix const correctness
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 9c781de015f32b2caadd5a6d999cc6885188a4a4 |
|
10-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i965: use new cast wrappers
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 13177f03fc19b67b909dee2272c44bc2e5f9afc3 |
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10-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i965: asst. code clean-ups, comments
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| d0415a5a01c1a8c2c2a389d977401a7f6cee031b |
|
25-Feb-2009 |
Eric Anholt <eric@anholt.net> |
i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 052c1d66a1ab1f2665870dc77dab28d20416cdf1 |
|
30-Jan-2009 |
Eric Anholt <eric@anholt.net> |
i965: Remove brw->attribs now that we can just always look in the GLcontext.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 264cba6f70eacd9e04646104d10ba63c248d7b83 |
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03-Dec-2008 |
Eric Anholt <eric@anholt.net> |
i965: Fix failure to upload new constant data when changing programs.
This is fallout from the ffvertex_prog.c work. It doesn't call
ProgramStringNotify, so we don't set param_state, so we wouldn't track when
VP parameters changed, and constants wouldn't get uploaded. Instead, remove
param_state entirely and just use the real value that we want to be tracking.
Fixes rendering in openarena since BRW_NEW_BATCH got disentangled from
BRW_NEW_INDICES.
Bug #18822.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 59b2c2adbbece27ccf54e58b598ea29cb3a5aa85 |
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24-Oct-2008 |
Eric Anholt <eric@anholt.net> |
i965: Fix check_aperture calls to cover everything needed for the prim at once.
Previously, since my check_aperture API change, we would check each piece of
state against the batchbuffer individually, but not all the state against the
batchbuffer at once. In addition to not being terribly useful in assuring
success, it probably also increased CPU load by calling check_aperture many
times per primitive.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| ec8076264ea2390d4cb749be5c88bbf2bf5d4847 |
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24-Oct-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: don't emit state when dri_bufmgr_check_aperture_space fails.
This ensures there is an unfilled batchbuffer used for emitting states again. Partial fix for #17964.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| d533da2db873942b3f8676a754b8be3c9718bedf |
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24-Sep-2008 |
Eric Anholt <eric@anholt.net> |
i965: Cope with batch getting flushed in the middle of batchbuffer emits.
This isn't required for GEM (at least, yet), but the check_aperture code
for non-GEM results in batch getting flushed during emit. brw_state_upload
restarts state emits, but a bunch of the state emit functions were assuming
that they would be called exactly once, after prepare and before new_batch.
Bug #17179.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
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18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| f75843a517bd188639e6866db2a7b04de3524e16 |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| d2796939f18815935c8fe1effb01fa9765d6c7d8 |
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08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 527e1cf172cb0a4d1f2891a351498669be1620cd |
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08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
965: cleanups to state emission from aperture checking and state ordering.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 407ce3da3c53c9ebba0fbf827d7b0f610122d44b |
|
11-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel-gem] Chase domain flag renaming in the DRM.
This is an API breakage only.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 4b5b008d54e86ac4f0a2176429d062100978ca8c |
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03-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Convert drivers to using libdrm bufmgr code.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| ab50ddaa9173ae108833db0edb209045788efc41 |
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07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
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| 008653ac55776d6b1c6d1627ad20937aa1c4dbda |
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17-Apr-2008 |
Dave Airlie <airlied@redhat.com> |
i965: initial attempt at fixing the aperture overflow
Makes state emission into a 2 phase, prepare sets things up and accounts
the size of all referenced buffer objects. The emit stage then actually
does the batchbuffer touching for emitting the objects.
There is an assert in dri_emit_reloc if a reloc occurs for a buffer
that hasn't been accounted yet.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 609ad99a1a4b3a59436c520b355f482dff64b34a |
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10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[965] Improve performance by allocating CURBE buffers a page at a time.
Since each one is only 64b, and kernel allocations are a page anyway, this
lets us reduce buffer allocation by packing many CURBEs into one buffer, for
each batchbuffer submitted. Improves openarena performance by around 10%.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| a04b632350e5d0e9994fc667afc59407a39da0ba |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| dc1608ae9d90a490ce32aa005488e3591a6d8369 |
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09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[965] Replace the always_update dirty flag with BRW_NEW_BATCH.
This allows us to avoid re-emitting some state when validate_state happens
multiple times per batchbuffer. Even though we flush batch per primitive
currently, that may still happen already if the primitive changed (this should
probably be fixed as well).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 38bad7677e57d629eeffd4ef39a7fc254db12735 |
|
14-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace the state cache suballocator with direct dri_bufmgr use.
The user-space suballocator that was used avoided relocation computations by
using the general and surface state base registers and allocating those types
of buffers out of pools built on top of single buffer objects. It also
avoided calls into the buffer manager for these small state allocations, since
only one buffer object was being used.
However, the buffer allocation cost appears to be low, and with relocation
caching, computing relocations for buffers is essentially free. Additionally,
implementing the suballocator required a don't-fence-subdata flag to disable
waiting on buffer maps so that writing new data didn't block on rendering using
old data, and careful handling when mapping to update old data (which we need
to do for unavoidable relocations with FBOs). More importantly, when the
suballocator filled, it had no replacement algorithm and just threw out all
of the contents and forced them to be recomputed, which is a significant cost.
This is the first step, which just changes the buffer type, but doesn't yet
improve the hash table to not result in full recompute on overflow. Because
the buffers are all allocated out of the general buffer allocator, we can
no longer use the general/surface state bases to avoid relocations, and they
are set to 0 instead.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| e3a6e60040b7f6ea7965e52f8f9881ed31e0347c |
|
08-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Convert the driver to dri_bufmgr interface and enable TTM.
This is currently believed to work but be a significant performance loss.
Performance recovery should be soon to follow.
The dri_bo_fake_disable_backing_store() call was added to allow backing store
disable like bufmgr_fake.c did, which is a significant performance win (though
it's missing the no-fence-subdata part).
This commit is a squash merge of the 965-ttm branch, which had some history
I wanted to avoid pulling due to noisiness and brokenness at many points
for git-bisecting.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 3a90679400e50fb5d319deee51e03a298735aa17 |
|
03-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Change constant buffer from state structs to plain batch emission.
Reduces diff to branch which has a relocation in this state emit.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 77e0523fb7769df4bf43747e136b1653b2421b97 |
|
04-Oct-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 38c30a81844214b030c9c637f9cf97bd2bf19cde |
|
26-Sep-2007 |
Eric Anholt <eric@anholt.net> |
[965] Remove AUB file support.
This code existed to dump logs of hardware access to be replayed in simulation.
Since we have real hardware now, it's not really needed.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 439fa7957874d564b30a92345e74ee57b388ebec |
|
24-Sep-2007 |
Zou Nan hai <nanhai.zou@intel.com> |
fix fd.o bug #12217, recalcuate urb when clip plane size change
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 064ae479a770bf434958d673baf6f7530f642697 |
|
23-Feb-2007 |
Brian <brian@yutani.localnet.net> |
Update DRI drivers for new glsl compiler.
Mostly:
- update #includes
- update STATE_* token code
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|
| 9f344b3e7d6e23674dd4747faec253f103563b36 |
|
09-Aug-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Add Intel i965G/Q DRI driver.
This driver comes from Tungsten Graphics, with a few further modifications by
Intel.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_curbe.c
|