/art/runtime/base/ |
H A D | casts.h | 83 Dest dest; local 84 memcpy(&dest, &source, sizeof(dest)); 85 return dest;
|
/art/runtime/ |
H A D | leb128.h | 118 static inline uint8_t* EncodeUnsignedLeb128(uint8_t* dest, uint32_t value) { argument 122 *dest++ = out | 0x80; 126 *dest++ = out; 127 return dest; 131 static inline void EncodeUnsignedLeb128(std::vector<uint8_t, Allocator>* dest, uint32_t value) { argument 135 dest->push_back(out | 0x80); 139 dest->push_back(out); 144 static inline void UpdateUnsignedLeb128(uint8_t* dest, uint32_t value) { argument 145 const uint8_t* old_end = dest; 148 for (uint8_t* end = EncodeUnsignedLeb128(dest, valu 155 EncodeSignedLeb128(uint8_t* dest, int32_t value) argument 169 EncodeSignedLeb128(std::vector<uint8_t, Allocator>* dest, int32_t value) argument [all...] |
/art/compiler/dex/quick/ |
H A D | mir_to_lir-inl.h | 81 inline LIR* Mir2Lir::NewLIR1(int opcode, int dest) { argument 86 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest); 91 inline LIR* Mir2Lir::NewLIR2(int opcode, int dest, int src1) { argument 96 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1); 111 inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { argument 116 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2); 121 inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { argument 126 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info); 131 inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, argument 137 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src [all...] |
H A D | local_optimizations.cc | 71 void Mir2Lir::ConvertMemOpIntoMove(LIR* orig_lir, RegStorage dest, RegStorage src) { argument 74 move_lir = OpRegCopyNoInsert(dest, src); 79 * will need to be re-checked (eg the new dest clobbers the src used in
|
H A D | codegen_util.cc | 201 int dest = lir->operands[0]; local 222 LOG(INFO) << "-------- entry offset: 0x" << std::hex << dest; local 234 LOG(INFO) << "-------- exit offset: 0x" << std::hex << dest; local
|
/art/compiler/jni/quick/ |
H A D | jni_compiler.cc | 591 FrameOffset dest = jni_conv->CurrentParamStackOffset(); local 592 __ StoreRawPtr(dest, in_reg);
|
/art/runtime/mirror/ |
H A D | object.cc | 70 Object* Object::CopyObject(Thread* self, mirror::Object* dest, mirror::Object* src, argument 75 uint8_t* dst_bytes = reinterpret_cast<uint8_t*>(dest); 82 CopyReferenceFieldsWithReadBarrierVisitor visitor(dest); 90 ObjectArray<Object>* array = dest->AsObjectArray<Object>(); 91 heap->WriteBarrierArray(dest, 0, array->GetLength()); 94 heap->WriteBarrierEveryFieldOf(dest); 97 heap->AddFinalizerReference(self, &dest); 99 return dest;
|
/art/compiler/dex/ |
H A D | ssa_transformation.cc | 410 * Perform dest U= src1 ^ ~src2 413 void MIRGraph::ComputeSuccLineIn(ArenaBitVector* dest, const ArenaBitVector* src1, argument 415 if (dest->GetStorageSize() != src1->GetStorageSize() || 416 dest->GetStorageSize() != src2->GetStorageSize() || 417 dest->IsExpandable() != src1->IsExpandable() || 418 dest->IsExpandable() != src2->IsExpandable()) { 423 for (idx = 0; idx < dest->GetStorageSize(); idx++) { 424 dest->GetRawStorage()[idx] |= src1->GetRawStorageWord(idx) & ~(src2->GetRawStorageWord(idx));
|
H A D | local_value_numbering.cc | 314 void LocalValueNumbering::CopyAliasingValuesMap(ScopedArenaSafeMap<K, AliasingValues>* dest, argument 319 auto it = dest->PutBefore(dest->end(), entry.first, AliasingValues(this)); 526 void LocalValueNumbering::CopyLiveSregValues(SregValueMap* dest, const SregValueMap& src) { argument 527 auto dest_end = dest->end(); 533 dest->PutBefore(dest_end, entry.first, entry.second);
|
H A D | mir_graph.cc | 409 int dest = -1; local 417 dest = check_insn->VRegA_12x(); 425 dest = check_insn->VRegA_22x(); 433 dest = check_insn->VRegA_32x(); 446 if (dest == monitor_reg || (wide && dest + 1 == monitor_reg)) {
|
/art/runtime/gc/collector/ |
H A D | semi_space.cc | 441 static inline size_t CopyAvoidingDirtyingPages(void* dest, const void* src, size_t size) { argument 447 memcpy(dest, src, size); 451 uint8_t* byte_dest = reinterpret_cast<uint8_t*>(dest); 462 memcpy(dest, src, page_remain);
|
/art/compiler/dex/quick/x86/ |
H A D | utility_x86.cc | 260 int dest = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); local 306 return NewLIR3(opcode, dest, r_base.GetReg(), offset);
|
H A D | int_x86.cc | 127 // If src or dest is a pair, we'll be using low reg. 1623 void X86Mir2Lir::GenImulRegImm(RegStorage dest, RegStorage src, int val) { argument 1626 NewLIR2(kX86Xor32RR, dest.GetReg(), dest.GetReg()); 1629 OpRegCopy(dest, src); 1632 OpRegRegImm(kOpMul, dest, src, val); 1637 void X86Mir2Lir::GenImulMemImm(RegStorage dest, int sreg, int displacement, int val) { argument 1645 NewLIR2(kX86Xor32RR, dest.GetReg(), dest.GetReg()); 1649 LoadBaseDisp(rs_rSP, displacement, dest, k3 2726 GetOpcode(Instruction::Code op, RegLocation dest, RegLocation rhs, bool is_high_op) argument [all...] |
/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 199 void Arm64Assembler::LoadImmediate(XRegister dest, int32_t value, argument 202 ___ Mov(reg_x(dest), value); 208 temps.Exclude(reg_x(dest)); 211 ___ Csel(reg_x(dest), temp, reg_x(dest), cond); 213 ___ Csel(reg_x(dest), reg_x(XZR), reg_x(dest), cond); 218 void Arm64Assembler::LoadWFromOffset(LoadOperandType type, WRegister dest, argument 222 ___ Ldrsb(reg_w(dest), MEM_OP(reg_x(base), offset)); 225 ___ Ldrsh(reg_w(dest), MEM_O 243 LoadFromOffset(XRegister dest, XRegister base, int32_t offset) argument 249 LoadSFromOffset(SRegister dest, XRegister base, int32_t offset) argument 254 LoadDFromOffset(DRegister dest, XRegister base, int32_t offset) argument 259 Load(Arm64ManagedRegister dest, XRegister base, int32_t offset, size_t size) argument 373 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister m_scratch) argument 383 Copy(FrameOffset dest, FrameOffset src, ManagedRegister m_scratch, size_t size) argument 399 Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister m_scratch, size_t size) argument 447 Arm64ManagedRegister dest = m_dest.AsArm64(); local [all...] |
/art/patchoat/ |
H A D | patchoat.cc | 424 auto* dest = RelocatedCopyOf(src); local 425 dest->SetDeclaringClass(RelocatedAddressOfPointer(src->GetDeclaringClass())); 435 auto* dest = RelocatedCopyOf(src); local 436 FixupMethod(src, dest); 636 auto* dest = down_cast<mirror::AbstractMethod*>(copy); local 638 dest->SetArtMethod(RelocatedAddressOfPointer(src->GetArtMethod()));
|
/art/compiler/ |
H A D | image_writer.cc | 1053 auto* const dest = reinterpret_cast<Object*>(image_writer_->image_begin_ + offset); local 1054 VLOG(compiler) << "Update root from " << obj << " to " << dest; local 1055 return dest; 1064 auto* dest = image_->Begin() + native_reloc.offset; local 1065 DCHECK_GE(dest, image_->Begin() + image_end_); 1066 memcpy(dest, pair.first, sizeof(ArtField)); 1067 reinterpret_cast<ArtField*>(dest)->SetDeclaringClass( 1071 auto* dest = image_->Begin() + native_reloc.offset; local 1072 DCHECK_GE(dest, image_->Begin() + image_end_); 1074 reinterpret_cast<ArtMethod*>(dest)); 1089 auto* dest = reinterpret_cast<ArtMethod*>(image_begin_ + it->second.offset); local 1090 image_header->SetImageMethod(static_cast<ImageHeader::ImageMethod>(i), dest); local 1311 auto* dest = down_cast<mirror::AbstractMethod*>(copy); local [all...] |
/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 614 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { argument 620 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 623 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); 625 SP, dest.Int32Value() + 4); 627 StoreFToOffset(src.AsFRegister(), SP, dest.Int32Value()); 630 StoreDToOffset(src.AsDRegister(), SP, dest.Int32Value()); 634 void MipsAssembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 637 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 640 void MipsAssembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 643 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest 646 StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister mscratch) argument 654 StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm, ManagedRegister mscratch) argument 676 StoreSpanning(FrameOffset dest, ManagedRegister msrc, FrameOffset in_off, ManagedRegister mscratch) argument 694 MipsManagedRegister dest = mdest.AsMips(); local 701 MipsManagedRegister dest = mdest.AsMips(); local 712 MipsManagedRegister dest = mdest.AsMips(); local 720 MipsManagedRegister dest = mdest.AsMips(); local 734 MipsManagedRegister dest = mdest.AsMips(); local 761 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 791 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 807 Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 828 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...] |
/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 1153 void Mips64Assembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { argument 1160 StoreToOffset(kStoreDoubleword, src.AsGpuRegister(), SP, dest.Int32Value()); 1162 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); 1169 StoreFpuToOffset(kStoreDoubleword, src.AsFpuRegister(), SP, dest.Int32Value()); 1171 StoreFpuToOffset(kStoreWord, src.AsFpuRegister(), SP, dest.Int32Value()); 1178 void Mips64Assembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 1181 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); 1184 void Mips64Assembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 1187 StoreToOffset(kStoreDoubleword, src.AsGpuRegister(), SP, dest.Int32Value()); 1190 void Mips64Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_ argument 1198 StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm, ManagedRegister mscratch) argument 1221 StoreSpanning(FrameOffset dest, ManagedRegister msrc, FrameOffset in_off, ManagedRegister mscratch) argument 1239 Mips64ManagedRegister dest = mdest.AsMips64(); local 1246 Mips64ManagedRegister dest = mdest.AsMips64(); local 1261 Mips64ManagedRegister dest = mdest.AsMips64(); local 1269 Mips64ManagedRegister dest = mdest.AsMips64(); local 1283 Mips64ManagedRegister dest = mdest.AsMips64(); local 1302 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 1330 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 1346 Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 1385 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...] |
/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1812 void X86Assembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 1815 movl(Address(ESP, dest), src.AsCpuRegister()); 1818 void X86Assembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 1821 movl(Address(ESP, dest), src.AsCpuRegister()); 1824 void X86Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, argument 1826 movl(Address(ESP, dest), Immediate(imm)); 1829 void X86Assembler::StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm, argument 1831 fs()->movl(Address::Absolute(dest), Immediate(imm)); 1853 X86ManagedRegister dest = mdest.AsX86(); local 1854 if (dest 1880 X86ManagedRegister dest = mdest.AsX86(); local 1907 X86ManagedRegister dest = mdest.AsX86(); local 1914 X86ManagedRegister dest = mdest.AsX86(); local 1924 X86ManagedRegister dest = mdest.AsX86(); local 1931 X86ManagedRegister dest = mdest.AsX86(); local 1959 X86ManagedRegister dest = mdest.AsX86(); local 1984 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 2010 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 2038 Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 2047 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister scratch, size_t size) argument 2056 Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_x86.cc | 4108 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); local 4111 __ xorps(dest, dest); 4117 __ movd(dest, temp); 4145 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); local 4148 __ xorpd(dest, dest); 4152 __ movsd(dest, Address(ESP, 0));
|
H A D | code_generator_x86_64.cc | 1951 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 1953 __ xorps(dest, dest); 1955 __ movss(dest, codegen_->LiteralFloatAddress(static_cast<float>(v))); 1969 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 1971 __ xorps(dest, dest); 1973 __ movss(dest, codegen_->LiteralFloatAddress(static_cast<float>(v))); 1987 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 1989 __ xorps(dest, des 2018 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 2036 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 2054 XmmRegister dest = out.AsFpuRegister<XmmRegister>(); local 3966 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); local 3983 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); local 4450 Load64BitValue(CpuRegister dest, int64_t value) argument [all...] |
H A D | nodes.h | 3837 Location dest = destination_; local 3839 return dest; 3842 void ClearPending(Location dest) { argument 3844 destination_ = dest;
|
/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2495 void X86_64Assembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 2498 movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); 2501 void X86_64Assembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 2504 movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); 2507 void X86_64Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, argument 2509 movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? 2512 void X86_64Assembler::StoreImmediateToThread64(ThreadOffset<8> dest, uint32_t imm, argument 2514 gs()->movl(Address::Absolute(dest, true), Immediate(imm)); // TODO(64) movq? 2536 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2537 if (dest 2568 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2594 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2601 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2611 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2617 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2645 X86_64ManagedRegister dest = mdest.AsX86_64(); local 2670 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 2695 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 2722 Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 2731 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister scratch, size_t size) argument 2740 Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...] |