/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | intel_extensions.c | 44 struct intel_context *intel = intel_context(ctx); local 96 if (intel->gen >= 6) 106 if (intel->gen == 6 || 107 (intel->gen == 7 && intel->intelScreen->kernel_has_gen7_sol_reset)) 110 if (intel->gen >= 6) { 111 ctx->Extensions.ARB_blend_func_extended = !driQueryOptionb(&intel->optionCache, "disable_blend_func_extended"); 120 if (intel->gen >= 5) 123 if (intel->gen >= 6) { 126 if (drm_intel_reg_read(intel [all...] |
H A D | i830_context.c | 58 struct intel_context *intel = &i830->intel; local 59 struct gl_context *ctx = &intel->ctx; 66 if (!intelInitContext(intel, __DRI_API_OPENGL, mesaVis, driContextPriv, 74 _math_matrix_ctr(&intel->ViewportMatrix); 84 if (intel->no_rast) 85 FALLBACK(intel, INTEL_FALLBACK_USER, 1); 87 intel->ctx.Const.MaxTextureUnits = I830_TEX_UNITS; 88 intel->ctx.Const.MaxTextureImageUnits = I830_TEX_UNITS; 89 intel [all...] |
H A D | intel_buffers.c | 41 intel_drawbuf_region(struct intel_context *intel) argument 44 intel_renderbuffer(intel->ctx.DrawBuffer->_ColorDrawBuffers[0]); 55 intel_readbuf_region(struct intel_context *intel) argument 58 = intel_renderbuffer(intel->ctx.ReadBuffer->_ColorReadBuffer); 67 * If so, set the intel->front_buffer_dirty field to true. 70 intel_check_front_buffer_rendering(struct intel_context *intel) argument 72 const struct gl_framebuffer *fb = intel->ctx.DrawBuffer; 77 intel->front_buffer_dirty = true; 87 struct intel_context *const intel = intel_context(ctx); local 89 intel 110 struct intel_context *const intel = intel_context(ctx); local [all...] |
H A D | intel_syncobj.c | 71 struct intel_context *intel = intel_context(ctx); local 75 intel_batchbuffer_emit_mi_flush(intel); 77 sync->bo = intel->batch.bo;
|
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | gen6_gs_state.c | 36 struct intel_context *intel = &brw->intel; local
|
H A D | gen6_sampler_state.c | 36 struct intel_context *intel = &brw->intel; local
|
H A D | gen7_disable.c | 32 struct intel_context *intel = &brw->intel; local
|
H A D | intel_extensions.c | 44 struct intel_context *intel = intel_context(ctx); local 96 if (intel->gen >= 6) 106 if (intel->gen == 6 || 107 (intel->gen == 7 && intel->intelScreen->kernel_has_gen7_sol_reset)) 110 if (intel->gen >= 6) { 111 ctx->Extensions.ARB_blend_func_extended = !driQueryOptionb(&intel->optionCache, "disable_blend_func_extended"); 120 if (intel->gen >= 5) 123 if (intel->gen >= 6) { 126 if (drm_intel_reg_read(intel [all...] |
H A D | brw_gs_state.c | 41 struct intel_context *intel = &brw->intel; local 80 if (intel->gen == 5)
|
H A D | brw_tex.c | 48 struct gl_context *ctx = &brw->intel.ctx; 49 struct intel_context *intel = &brw->intel; local 56 intel_finalize_mipmap_tree(intel, i);
|
H A D | brw_clip_state.c | 39 struct intel_context *intel = &brw->intel; local 40 struct gl_context *ctx = &intel->ctx; 83 if (intel->gen == 5) 106 if (intel->is_g4x)
|
H A D | brw_vs_state.c | 42 struct intel_context *intel = &brw->intel; local 43 struct gl_context *ctx = &intel->ctx; 72 vs->thread1.single_program_flow = (intel->gen == 5); 104 if (intel->gen == 5) { 130 assert(intel->is_g4x); 158 drm_intel_bo_emit_reloc(intel->batch.bo,
|
H A D | gen6_urb.c | 52 struct intel_context *intel = &brw->intel; local 114 intel_batchbuffer_emit_mi_flush(intel);
|
H A D | gen7_vs_state.c | 35 struct intel_context *intel = &brw->intel; local 37 const int max_threads_shift = brw->intel.is_haswell ? 40 gen7_emit_vs_workaround_flush(intel); 83 if (intel->ctx.Shader.CurrentVertexProgram == NULL)
|
H A D | gen6_clip_state.c | 37 struct intel_context *intel = &brw->intel; local 38 struct gl_context *ctx = &intel->ctx;
|
H A D | gen6_scissor_state.c | 37 struct intel_context *intel = &brw->intel; local 38 struct gl_context *ctx = &intel->ctx;
|
H A D | gen7_cc_state.c | 34 struct intel_context *intel = &brw->intel; local 54 struct intel_context *intel = &brw->intel; local 74 struct intel_context *intel = &brw->intel; local
|
H A D | brw_clip_line.c | 48 struct intel_context *intel = &c->func.brw->intel; local 88 if (intel->needs_ff_sync) {
|
H A D | brw_primitive_restart.c | 24 * Jordan Justen <jordan.l.justen@intel.com> 45 struct intel_context *intel = intel_context(ctx); local 48 if (intel->is_haswell) 191 struct intel_context *intel = &brw->intel; local 192 struct gl_context *ctx = &intel->ctx; 195 if (!intel->is_haswell)
|
H A D | brw_sf.c | 53 struct intel_context *intel = &brw->intel; local 79 c.urb_entry_read_offset = brw_sf_compute_urb_entry_read_offset(intel); 121 intel->gen); 138 struct gl_context *ctx = &brw->intel.ctx; 151 switch (brw->intel.reduced_primitive) {
|
H A D | brw_vs_surface_state.c | 47 struct gl_context *ctx = &brw->intel.ctx; 48 struct intel_context *intel = &brw->intel; local 61 _mesa_load_state_parameters(&brw->intel.ctx, vp->program.Base.Parameters); 76 brw->vs.const_bo = drm_intel_bo_alloc(intel->bufmgr, "vp_const_buffer", 98 intel->vtbl.create_constant_surface(brw, brw->vs.const_bo, 0, 117 struct gl_context *ctx = &brw->intel.ctx;
|
H A D | brw_vtbl.c | 68 static void brw_destroy_context( struct intel_context *intel ) 70 struct brw_context *brw = brw_context(&intel->ctx); 84 drm_intel_gem_context_destroy(intel->hw_ctx); 98 brw_update_draw_buffer(struct intel_context *intel) argument 100 struct gl_context *ctx = &intel->ctx; 131 intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL); 136 intel->NewGLState |= _NEW_BUFFERS; 139 intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR; 144 intel->NewGLState |= _NEW_POLYGON; 155 static void brw_finish_batch(struct intel_context *intel) argument 209 brw_invalidate_state( struct intel_context *intel, GLuint new_state ) argument 217 brw_is_hiz_depth_format(struct intel_context *intel, gl_format format) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/intel/ |
H A D | intel_buffers.h | 39 extern struct intel_region *intel_readbuf_region(struct intel_context *intel); 41 extern struct intel_region *intel_drawbuf_region(struct intel_context *intel); 43 extern void intel_check_front_buffer_rendering(struct intel_context *intel); 48 struct intel_context *intel = intel_context(ctx); local 50 intel->vtbl.update_draw_buffer(intel);
|
H A D | intel_extensions.c | 44 struct intel_context *intel = intel_context(ctx); local 96 if (intel->gen >= 6) 106 if (intel->gen == 6 || 107 (intel->gen == 7 && intel->intelScreen->kernel_has_gen7_sol_reset)) 110 if (intel->gen >= 6) { 111 ctx->Extensions.ARB_blend_func_extended = !driQueryOptionb(&intel->optionCache, "disable_blend_func_extended"); 120 if (intel->gen >= 5) 123 if (intel->gen >= 6) { 126 if (drm_intel_reg_read(intel [all...] |
/external/boringssl/mac-x86_64/crypto/ |
H A D | cpu-x86_64-asm.S | 29 jz L$intel 40 jnz L$intel 50 jb L$intel 60 jb L$intel 79 L$intel:
|