/external/skia/experimental/PdfViewer/pdfparser/native/pdfapi/ |
H A D | SkPdfAppearanceCharacteristicsDictionary_autogen.cpp | 95 SkPdfStream* SkPdfAppearanceCharacteristicsDictionary::RI(SkPdfNativeDoc* doc) { function in class:SkPdfAppearanceCharacteristicsDictionary 96 SkPdfNativeObject* ret = get("RI", ""); 104 return get("RI", "") != NULL;
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/external/llvm/lib/CodeGen/ |
H A D | ScheduleDAGInstrs.cpp | 1349 RI = RootSet.begin(), RE = RootSet.end(); RI != RE; ++RI) { 1350 unsigned TreeID = SubtreeClasses[RI->NodeID]; 1351 if (RI->ParentNodeID != SchedDFSResult::InvalidSubtreeID) 1352 R.DFSTreeData[TreeID].ParentTreeID = SubtreeClasses[RI->ParentNodeID]; 1353 R.DFSTreeData[TreeID].SubInstrCount = RI->SubInstrCount;
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H A D | LiveInterval.cpp | 1379 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LI.reg), 1380 RE = MRI.reg_end(); RI != RE;) { 1381 MachineOperand &MO = *RI; 1382 MachineInstr *MI = RI->getParent(); 1383 ++RI;
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H A D | CodeGenPrepare.cpp | 1428 ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator()); 1429 if (!RI) 1434 Value *V = RI->getReturnValue(); 1464 if (&*BI != RI) 1469 if (&*BI != RI) 1491 BasicBlock::InstListType::reverse_iterator RI = InstList.rbegin(); local 1493 do { ++RI; } while (RI != RE && isa<DbgInfoIntrinsic>(&*RI)); 1494 if (RI [all...] |
/external/llvm/lib/Transforms/IPO/ |
H A D | MergeFunctions.cpp | 441 AttributeSet::iterator LI = L.begin(i), LE = L.end(i), RI = R.begin(i), local 443 for (; LI != LE && RI != RE; ++LI, ++RI) { 445 Attribute RA = *RI; 453 if (RI != RE)
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/external/llvm/lib/Transforms/Utils/ |
H A D | SimplifyCFG.cpp | 125 bool SimplifyReturn(ReturnInst *RI, IRBuilder<> &Builder); 126 bool SimplifyResume(ResumeInst *RI, IRBuilder<> &Builder); 1411 for (BasicBlock::reverse_iterator RI = BrBB->rbegin(), 1412 RE = BrBB->rend(); RI != RE && (--MaxNumInstToLookAt); ++RI) { 1413 Instruction *CurI = &*RI; 1997 Value *RI = !TrueValue ? local 2000 (void) RI; 2003 << "\n " << *BI << "NewRet = " << *RI 2913 bool SimplifyCFGOpt::SimplifyResume(ResumeInst *RI, IRBuilde argument 2959 SimplifyReturn(ReturnInst *RI, IRBuilder<> &Builder) argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 34 RI(STI.getTargetTriple()), Subtarget(STI) {} 378 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); 1697 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, 1699 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, 1714 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, 1716 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, 1731 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, 1733 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, 1739 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, 1741 SrcReg = RI [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 66 RI(), Subtarget(ST) {} 448 if(SrcReg == RI.getSubReg(DestReg, Hexagon::subreg_loreg)) { 450 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrsi), (RI.getSubReg(DestReg, 454 BuildMI(MBB, I, DL, get(Hexagon::A2_tfr), (RI.getSubReg(DestReg, 456 BuildMI(MBB, I, DL, get(Hexagon::A2_tfrsi), (RI.getSubReg(DestReg, 1110 const TargetRegisterClass* RC = RI.getMinimalPhysRegClass(MO.getReg());
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/external/clang/lib/Sema/ |
H A D | SemaStmt.cpp | 1088 for (CaseRangesTy::const_iterator RI = CaseRanges.begin(); 1089 RI != CaseRanges.end(); RI++) { 1090 Expr *CaseExpr = RI->second->getLHS(); 1092 RI->first)) 1097 RI->second->getRHS()->EvaluateKnownConstInt(Context); 1100 CaseExpr = RI->second->getRHS(); 1109 auto RI = CaseRanges.begin(); local 1123 for (; RI != CaseRanges.end(); RI [all...] |
H A D | SemaLookup.cpp | 3529 for (TypoResultList::iterator RI = CList.begin(), RIEnd = CList.end(); 3530 RI != RIEnd; ++RI) { 3535 if (RI->getCorrectionDecl() == NewND) { 3536 if (CorrectionStr < RI->getAsString(SemaRef.getLangOpts())) 3537 *RI = Correction; 3586 auto RI = DI->second.begin(); local 3587 if (RI->second.empty()) { 3588 DI->second.erase(RI); 3593 TypoCorrection TC = RI [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 112 const TargetRegisterInfo *RI = local 114 unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
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/external/llvm/lib/Analysis/IPA/ |
H A D | InlineCost.cpp | 138 bool visitReturnInst(ReturnInst &RI); 142 bool visitResumeInst(ResumeInst &RI); 803 bool CallAnalyzer::visitReturnInst(ReturnInst &RI) { argument 861 bool CallAnalyzer::visitResumeInst(ResumeInst &RI) { argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 35 RI() {}
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H A D | MSP430ISelLowering.cpp | 1196 MachineRegisterInfo &RI = F->getRegInfo(); local 1253 unsigned ShiftAmtReg = RI.createVirtualRegister(&MSP430::GR8RegClass); 1254 unsigned ShiftAmtReg2 = RI.createVirtualRegister(&MSP430::GR8RegClass); 1255 unsigned ShiftReg = RI.createVirtualRegister(RC); 1256 unsigned ShiftReg2 = RI.createVirtualRegister(RC);
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/external/clang/lib/Frontend/ |
H A D | TextDiagnostic.cpp | 830 for (ArrayRef<CharSourceRange>::const_iterator RI = Ranges.begin(), 832 RI != RE; ++RI) { 834 if (!RI->isValid()) continue; 836 SourceLocation B = SM.getExpansionLoc(RI->getBegin()); 837 SourceLocation E = SM.getExpansionLoc(RI->getEnd()); 844 if (B == E && RI->getEnd().isMacroID()) 845 E = SM.getExpansionRange(RI->getEnd()).second; 858 if (RI->isTokenRange())
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfCompileUnit.cpp | 289 const TargetRegisterInfo *RI = Asm->MF->getSubtarget().getRegisterInfo(); local 290 MachineLocation Location(RI->getFrameRegister(*Asm->MF)); 291 if (RI->isPhysicalRegister(Location.getReg()))
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/external/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 1118 const MCRegisterInfo *RI = Ctx.getRegisterInfo(); local 1119 uint32_t Reg = RI->getRegClass(AArch64::GPR32RegClassID).getRegister( 1120 RI->getEncodingValue(getReg())); 2951 const MCRegisterInfo *RI = Ctx.getRegisterInfo(); local 2952 if (!RI->getRegClass(AArch64::GPR64spRegClassID).contains(RegNum)) 3309 const MCRegisterInfo *RI = getContext().getRegisterInfo(); local 3322 if (RI->isSubRegisterEq(Rn, Rt)) 3325 if (RI->isSubRegisterEq(Rn, Rt2)) 3368 if (RI->isSubRegisterEq(Rn, Rt)) 3371 if (RI [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 215 static unsigned getPairedGPR(unsigned Reg, bool Odd, const MCRegisterInfo *RI) { argument 216 for (MCSuperRegIterator Supers(Reg, RI); Supers.isValid(); ++Supers) 218 return RI->getSubReg(*Supers, Odd ? ARM::gsub_1 : ARM::gsub_0);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 302 const TargetRegisterInfo &RI = *MF->getSubtarget().getRegisterInfo(); local 304 unsigned stackReg = RI.getFrameRegister(*MF); 305 unsigned returnReg = RI.getRARegister();
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/external/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 992 const X86RegisterInfo *RI = MF->getSubtarget<X86Subtarget>().getRegisterInfo(); local 1109 OutStreamer.EmitWinCFIPushReg(RI->getSEHRegNum(MI->getOperand(0).getImm())); 1113 OutStreamer.EmitWinCFISaveReg(RI->getSEHRegNum(MI->getOperand(0).getImm()), 1118 OutStreamer.EmitWinCFISaveXMM(RI->getSEHRegNum(MI->getOperand(0).getImm()), 1127 OutStreamer.EmitWinCFISetFrame(RI->getSEHRegNum(MI->getOperand(0).getImm()),
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/external/llvm/utils/TableGen/ |
H A D | SubtargetEmitter.cpp | 1339 for (RecIter RI = TI->PredTerm.begin(), RE = TI->PredTerm.end(); 1340 RI != RE; ++RI) { 1341 if (RI != TI->PredTerm.begin()) 1343 OS << "(" << (*RI)->getValueAsString("Predicate") << ")";
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/external/llvm/lib/IR/ |
H A D | Instructions.cpp | 640 ReturnInst::ReturnInst(const ReturnInst &RI) argument 641 : TerminatorInst(Type::getVoidTy(RI.getContext()), Instruction::Ret, 643 RI.getNumOperands(), 644 RI.getNumOperands()) { 645 if (RI.getNumOperands()) 646 Op<0>() = RI.Op<0>(); 647 SubclassOptionalData = RI.SubclassOptionalData; 690 ResumeInst::ResumeInst(const ResumeInst &RI) argument 691 : TerminatorInst(Type::getVoidTy(RI.getContext()), Instruction::Resume, 693 Op<0>() = RI [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSelect.cpp | 1130 Instruction *RI = local 1135 RI->setFastMathFlags(Flags); 1136 return RI;
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/external/valgrind/VEX/priv/ |
H A D | guest_s390_toIR.c | 14128 } RI; member in union:__anon14992 14222 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1, 14223 ovl.fmt.RI.i2); goto ok; 14224 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1, 14225 ovl.fmt.RI.i2); goto ok; 14226 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1, 14227 ovl.fmt.RI.i2); goto ok; 14228 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1, 14229 ovl.fmt.RI.i2); goto ok; 14230 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI [all...] |
/external/clang/lib/Lex/ |
H A D | PPDirectives.cpp | 367 StringRef RI = Tok.getRawIdentifier(); local 369 char FirstChar = RI[0]; 383 if (!Tok.needsCleaning() && RI.size() < 20) { 384 Directive = RI;
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