Searched refs:regs (Results 1 - 13 of 13) sorted by relevance

/art/runtime/arch/arm/
H A Djni_entrypoints_arm.S24 push {r0, r1, r2, r3, lr} @ spill regs
38 pop {r0, r1, r2, r3, lr} @ restore regs
47 pop {r0, r1, r2, r3, pc} @ restore regs and return to caller to handle exception
H A Dquick_entrypoints_arm.S387 push {r4, r5, r6, r7, r8, r9, r10, r11, lr} @ spill regs
439 pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} @ restore spill regs
/art/runtime/arch/arm64/
H A Dfault_handler_arm64.cc51 sc->regs[0] = reinterpret_cast<uintptr_t>(*self->GetNestedSignalState());
52 sc->regs[1] = 1;
73 *out_method = reinterpret_cast<ArtMethod*>(sc->regs[0]);
96 sc->regs[30] = sc->pc + 4; // LR needs to point to gc map location
151 sc->regs[30] = sc->pc + 4;
/art/test/
H A DAndroid.libarttest.mk35 457-regs/regs_jni.cc \
H A DAndroid.run-test.mk371 457-regs \
412 457-regs
479 457-regs \
/art/compiler/utils/arm/
H A Dassembler_thumb2.cc411 RegList regs,
413 CHECK_NE(regs, 0u); // Do not use ldm if there's nothing to load.
414 if (IsPowerOfTwo(regs)) {
417 int reg = CTZ(static_cast<uint32_t>(regs));
422 EmitMultiMemOp(cond, am, true, base, regs);
429 RegList regs,
431 CHECK_NE(regs, 0u); // Do not use stm if there's nothing to store.
432 if (IsPowerOfTwo(regs)) {
435 int reg = CTZ(static_cast<uint32_t>(regs));
441 EmitMultiMemOp(cond, am, false, base, regs);
409 ldm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
427 stm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
1522 EmitMultiMemOp(Condition cond, BlockAddressMode bam, bool load, Register base, RegList regs) argument
2224 PushList(RegList regs, Condition cond) argument
2229 PopList(RegList regs, Condition cond) argument
[all...]
H A Dassembler_arm32.h119 RegList regs, Condition cond = AL) OVERRIDE;
121 RegList regs, Condition cond = AL) OVERRIDE;
228 void PushList(RegList regs, Condition cond = AL) OVERRIDE;
229 void PopList(RegList regs, Condition cond = AL) OVERRIDE;
319 RegList regs);
H A Dassembler_thumb2.h149 RegList regs, Condition cond = AL) OVERRIDE;
151 RegList regs, Condition cond = AL) OVERRIDE;
267 void PushList(RegList regs, Condition cond = AL) OVERRIDE;
268 void PopList(RegList regs, Condition cond = AL) OVERRIDE;
398 RegList regs);
H A Dassembler_arm32.cc334 RegList regs,
336 EmitMultiMemOp(cond, am, true, base, regs);
342 RegList regs,
344 EmitMultiMemOp(cond, am, false, base, regs);
671 RegList regs) {
679 regs;
1300 void Arm32Assembler::PushList(RegList regs, Condition cond) { argument
1301 stm(DB_W, SP, regs, cond);
1305 void Arm32Assembler::PopList(RegList regs, Condition cond) { argument
1306 ldm(IA_W, SP, regs, con
332 ldm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
340 stm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
667 EmitMultiMemOp(Condition cond, BlockAddressMode am, bool load, Register base, RegList regs) argument
[all...]
H A Dassembler_arm.h430 RegList regs, Condition cond = AL) = 0;
432 RegList regs, Condition cond = AL) = 0;
615 virtual void PushList(RegList regs, Condition cond = AL) = 0;
616 virtual void PopList(RegList regs, Condition cond = AL) = 0;
/art/compiler/dex/quick/
H A Dralloc_util.cc115 // Mark temp regs - all others not in use can be used for promotion
143 void Mir2Lir::DumpRegPool(ArenaVector<RegisterInfo*>* regs) { argument
145 for (RegisterInfo* info : *regs) {
337 RegStorage Mir2Lir::AllocTempBody(ArenaVector<RegisterInfo*>& regs, int* next_temp, bool required) { argument
338 int num_regs = regs.size();
344 RegisterInfo* info = regs[next];
366 // No free non-live regs. Anything we can kill?
371 RegisterInfo* info = regs[next];
460 RegStorage Mir2Lir::FindLiveReg(ArenaVector<RegisterInfo*>& regs, int s_reg) { argument
462 for (RegisterInfo* info : regs) {
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H A Dmir_to_lir.h263 * other fields have meaning. [perhaps not true, wide should work for promoted regs?]
702 void CompilerInitPool(RegisterInfo* info, RegStorage* regs, int num);
703 void DumpRegPool(ArenaVector<RegisterInfo*>* regs);
718 RegStorage AllocTempBody(ArenaVector<RegisterInfo*>& regs, int* next_temp, bool required);
729 RegStorage FindLiveReg(ArenaVector<RegisterInfo*>& regs, int s_reg);
/art/compiler/dex/quick/x86/
H A Dtarget_x86.cc486 /* Clobber all regs that might be used by an external C call */
709 // Don't start allocating temps at r0/s0/d0 or you may clobber return regs in early-exit methods.
1510 ArenaVector<RegisterInfo*>* regs = local
1512 auto it = std::find(regs->begin(), regs->end(), info);
1513 DCHECK(it != regs->end());
1514 regs->erase(it);
2486 va_list regs; local
2487 va_start(regs, n_regs);
2489 RegStorage reg = *(va_arg(regs, RegStorag
[all...]

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