Searched refs:AddrReg (Results 1 - 11 of 11) sorted by relevance
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsNaClELFStreamer.cpp | 93 void emitMask(unsigned AddrReg, unsigned MaskReg, argument 97 MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); 98 MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); 106 unsigned AddrReg = MI.getOperand(0).getReg(); local 109 emitMask(AddrReg, IndirectBranchMaskReg, STI);
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/external/llvm/lib/Target/R600/ |
H A D | R600InstrInfo.cpp | 1123 unsigned AddrReg; local 1126 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; 1127 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; 1128 case 2: AddrReg = AMDGPU::R600_Addr_ZRegClass.getRegister(Address); break; 1129 case 3: AddrReg = AMDGPU::R600_Addr_WRegClass.getRegister(Address); break; 1136 AddrReg, ValueReg) 1155 unsigned AddrReg; local 1158 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; 1159 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; 1160 case 2: AddrReg [all...] |
H A D | SILoadStoreOptimizer.cpp | 215 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); local 253 .addOperand(*AddrReg) // addr 273 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg());
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H A D | SIInstrInfo.cpp | 198 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 201 BaseReg = AddrReg->getReg(); 234 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 236 BaseReg = AddrReg->getReg(); 248 const MachineOperand *AddrReg = getNamedOperand(*LdSt, local 250 if (!AddrReg) 255 BaseReg = AddrReg->getReg();
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 644 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); local 645 O << ", [" << getRegisterName(AddrReg) << ']';
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1732 unsigned AddrReg = getRegForValue(I->getOperand(0)); local 1733 if (AddrReg == 0) 1737 .addReg(AddrReg);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2429 unsigned AddrReg = getRegForValue(BI->getOperand(0)); local 2430 if (AddrReg == 0) 2435 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); 2436 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II).addReg(AddrReg);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1351 unsigned AddrReg = getRegForValue(I->getOperand(0)); local 1352 if (AddrReg == 0) return false; 1356 TII.get(Opc)).addReg(AddrReg));
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 3357 unsigned AddrReg = createResultReg(&X86::GR64RegClass); local 3359 AddrReg) 3363 addDirectMem(MIB, AddrReg);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2029 unsigned AddrReg = ABI.IsN64() ? Mips::V0_64 : Mips::V0; local 2031 Chain = DAG.getCopyToReg(Chain, DL, AddrReg, Handler, Chain.getValue(1)); 2034 DAG.getRegister(AddrReg, getPointerTy()),
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 2978 unsigned AddrReg = MI->getOperand(1).getReg(); local 2999 .addReg(AddrReg).addImm(0); 3048 .addReg(AddrReg).addReg(ValReg).addReg(UpdReg)
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