Searched refs:rs_sp (Results 1 - 7 of 7) sorted by relevance

/art/compiler/dex/quick/mips/
H A Dcall_mips.cc288 const RegStorage rs_sp = TargetPtrReg(kSp); local
306 Load32Disp(rs_sp, -kStackOverflowReservedUsableBytes, rs_rZERO);
339 OpRegRegImm(kOpSub, new_sp, rs_sp, frame_sub);
343 OpRegCopy(rs_sp, new_sp); // Establish stack.
348 OpRegImm(kOpSub, rs_sp, frame_sub);
396 const RegStorage rs_sp = TargetPtrReg(kSp); local
397 OpRegImm(kOpSub, rs_sp, frame_size_);
399 StoreWordDisp(rs_sp, frame_size_ - (cu_->target64 ? 8 : 4), TargetPtrReg(kLr));
401 StoreWordDisp(rs_sp, 0, TargetPtrReg(kArg0));
407 const RegStorage rs_sp local
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H A Dtarget_mips.cc851 const RegStorage rs_sp = TargetPtrReg(kSp); local
852 OpRegImm(kOpSub, rs_sp, offset);
857 StoreWordDisp(rs_sp, offset,
871 const RegStorage rs_sp = TargetPtrReg(kSp); local
875 LoadWordDisp(rs_sp, offset,
880 OpRegImm(kOpAdd, rs_sp, frame_size_);
/art/compiler/dex/quick/arm64/
H A Dcall_arm64.cc341 OpRegRegImm(kOpSub, rs_x8, rs_sp, GetStackOverflowReservedBytes(kArm64));
349 spilled_already = SpillRegs(rs_sp, core_spill_mask_, fp_spill_mask_, frame_size_);
354 OpRegImm(kOpSub, rs_sp, frame_size_without_spills);
371 m2l_->OpRegImm(kOpAdd, rs_sp, sp_displace_);
386 LIR* branch = OpCmpBranch(kCondUlt, rs_sp, rs_xIP1, nullptr);
413 UnspillRegs(rs_sp, core_spill_mask_, fp_spill_mask_, frame_size_);
435 NewLIR4(WIDE(kA64StpPre4rrXD), rs_x0.GetReg(), rs_xLR.GetReg(), rs_sp.GetReg(), -frame_size_ / 8);
443 NewLIR4(WIDE(kA64LdpPost4rrXD), rs_x0.GetReg(), rs_xLR.GetReg(), rs_sp.GetReg(), frame_size_ / 8);
H A Dint_arm64.cc1516 m2l->OpRegRegImm(kOpSub, rs_sp, rs_sp, frame_size);
1525 SpillFPRegs(m2l, rs_sp, spill_offset, fp_reg_mask);
1531 SpillCoreRegs(m2l, rs_sp, spill_offset, core_reg_mask);
1729 DCHECK_EQ(base, rs_sp);
1763 OpRegImm64(kOpAdd, rs_sp, early_drop);
1770 UnSpillFPRegs(this, rs_sp, offset, fp_reg_mask);
1774 UnSpillCoreRegs(this, rs_sp, offset, core_reg_mask);
1779 OpRegImm64(kOpAdd, rs_sp, adjust);
H A Darm64_lir.h177 constexpr RegStorage rs_sp(RegStorage::kValid | rsp);
H A Dutility_arm64.cc668 if (r_dest_src1 == rs_sp) {
1266 DCHECK_EQ(r_base, rs_sp);
1356 DCHECK_EQ(r_base, rs_sp);
H A Dtarget_arm64.cc57 static constexpr RegStorage reserved64_regs_arr[] = {rs_xSELF, rs_sp, rs_xLR, rs_xzr};

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