Searched defs:temp (Results 1 - 25 of 47) sorted by last modified time

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/art/compiler/dex/
H A Dmir_optimization.cc250 // This logic is written with assumption that Method* is only special temp.
301 LOG(INFO) << "CompilerTemps: A compiler temp of type " << ct_type_str << " that is "
308 // Create the type of temp requested. Special temps need special handling because
313 // and thus even for 64-bit, we allow only a non-wide temp to be requested.
316 // The vreg is always the first special temp for method ptr.
330 LOG(INFO) << "CompilerTemps: Not enough temp(s) of type " << ct_type_str
342 // The new non-special compiler temp must receive a unique v_reg.
355 LOG(INFO) << "CompilerTemps: Not enough temp(s) of type " << ct_type_str
361 // The new non-special compiler temp must receive a unique v_reg.
365 UNIMPLEMENTED(FATAL) << "No handling for compiler temp typ
415 RemoveLastCompilerTemp(CompilerTempType ct_type, bool wide, CompilerTemp* temp) argument
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/art/compiler/dex/quick/arm/
H A Dint_arm.cc732 // Put the literal in a temp.
736 // TODO: The literal temp can be freed earlier during a modulus to reduce reg pressure.
751 // temp = reg1 / reg2 - integer division
752 // temp = temp * reg2
753 // dest = reg1 - temp
755 RegStorage temp = AllocTemp(); local
756 OpRegRegReg(kOpDiv, temp, reg1, reg2);
757 OpRegReg(kOpMul, temp, reg2);
758 OpRegRegReg(kOpSub, rl_result.reg, reg1, temp);
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/art/compiler/dex/quick/arm64/
H A Dint_arm64.cc304 // It is possible that temp register is 64-bit. (ArgReg or RefReg)
618 // Put the literal in a temp.
622 // TODO: The literal temp can be freed earlier during a modulus to reduce reg pressure.
644 // temp = r_src1 / r_src2
645 // dest = r_src1 - temp * r_src2
646 RegStorage temp; local
649 temp = AllocTempWide();
652 temp = AllocTemp();
655 OpRegRegReg(kOpDiv, temp, r_src1, r_src2);
656 NewLIR4(kA64Msub4rrrr | wide, rl_result.reg.GetReg(), temp
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/art/compiler/dex/quick/
H A Dgen_loadstore.cc28 * Load an immediate value into a fixed or temp register. Target
397 RegStorage temp = AllocTempWide(); local
398 OpRegCopy(temp, loc.reg);
399 loc.reg = temp;
/art/compiler/dex/quick/mips/
H A Dint_mips.cc48 * slt temp, x, y; # (x < y) ? 1:0
50 * subu res, res, temp; # res = -1:1:0 for [ < > = ]
57 RegStorage temp = AllocTempWide(); local
59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
61 NewLIR3(kMipsSubu, rl_result.reg.GetReg(), rl_result.reg.GetReg(), temp.GetReg());
62 FreeTemp(temp);
/art/compiler/dex/quick/x86/
H A Dint_x86.cc46 NewLIR2(kX86Set8R, temp_reg.GetReg(), kX86CondL); // temp = (src1 >= src2) ? 0 : 1
704 // We need the value at least twice. Load into a temp.
856 * and a temp register (e.g. 'edi') for intermediate calculations.
1077 RegStorage temp = AllocateByteRegister(); local
1078 OpRegCopy(temp, rl_src_value.reg);
1079 rl_value.reg = temp;
1332 // First REV shall clobber rl_result.reg.GetLowReg(), save the value in a temp for the second
1339 // Free up at least one input register if it was a temp. Otherwise we may be in the bad
1340 // situation of not having a temp available for SwapBits. Make sure it's not overlapping
1343 // There's definitely a free temp afte
2536 RegStorage temp = AllocTemp(); local
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H A Dtarget_x86.cc80 // 1) Remove register from array defining temp
94 // according to ABI and QCG needs one additional XMM temp for
1645 * - Get xmm2 and xmm3 as temp
1664 * calculation only once. Thus we don't need the xmm3 temp above. That sequence becomes:
2001 // We need a temp for byte and short values
2002 RegStorage temp; local
2034 * 1-1) Get an xmm temp and fill it with vector register.
2035 * 1-2) Shift the xmm temp by 8-bytes.
2036 * 1-3) Add the xmm temp to vector register that is being reduced.
2037 * 2) Allocate temp G
2554 RegStorage temp = AllocTempDouble(); local
2624 RegStorage temp = TargetReg(kArg3, kNotWide); local
2627 Load32Disp(TargetPtrReg(kSp), current_src_offset, temp); local
2628 Store32Disp(TargetPtrReg(kSp), current_dest_offset, temp); local
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H A Dutility_x86.cc733 RegStorage temp = AllocTemp(); local
734 load = NewLIR5(opcode, temp.GetReg(), r_base.GetReg(), r_index.GetReg(), scale,
738 OpRegCopy(r_dest.GetHigh(), temp);
739 FreeTemp(temp);
749 RegStorage temp = AllocTemp(); local
750 load = NewLIR5(opcode, temp.GetReg(), r_base.GetReg(), r_index.GetReg(), scale,
754 OpRegCopy(r_dest.GetLow(), temp);
755 FreeTemp(temp);
919 // valid, allocate a temp.
1131 // Now, if the dex cache array base temp i
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/art/compiler/driver/
H A Dcompiler_driver-inl.h189 std::string temp; local
191 dex_file->FindStringId(resolved_member->GetDeclaringClass()->GetDescriptor(&temp));
H A Dcompiler_driver.cc749 std::string temp; local
750 image_classes->insert(klass->GetDescriptor(&temp));
827 std::string temp; local
830 const char* descriptor = klass->GetDescriptor(&temp);
920 std::string temp; local
921 const char* name = klass->GetDescriptor(&temp);
1009 std::string temp; local
1010 const char* descriptor = klass->GetDescriptor(&temp);
1697 std::string temp; local
1698 const char* descriptor = exception->GetClass()->GetDescriptor(&temp);
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/art/compiler/
H A Dimage_writer.cc591 std::string temp; local
592 return compiler_driver_.IsImageClass(klass->GetDescriptor(&temp));
675 std::string temp; local
676 context->non_image_classes->insert(klass->GetDescriptor(&temp));
694 std::string temp; local
695 CHECK(image_writer->IsImageClass(klass)) << klass->GetDescriptor(&temp)
/art/compiler/optimizing/
H A Dbuilder.cc48 HInstruction* temp = new (graph_->GetArena()) HTemporary(index_); local
49 instruction->GetBlock()->AddInstruction(temp);
51 DCHECK(temp->GetPrevious() == instruction);
H A Dcode_generator_arm.cc462 // Reserve temp register.
975 Register temp = IP; local
976 __ LoadImmediate(temp, value);
977 __ cmp(left, ShifterOperand(temp));
1054 Register temp = IP; local
1055 __ LoadImmediate(temp, value);
1056 __ cmp(left, ShifterOperand(temp));
1279 Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); local
1281 codegen_->GenerateStaticOrDirectCall(invoke, temp);
1314 Register temp local
1348 Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); local
1727 SRegister temp = locations->GetTemp(0).AsFpuRegisterPairLow<SRegister>(); local
2364 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
2521 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
2967 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
3388 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
3495 MarkGCCard(Register temp, Register card, Register object, Register value) argument
3504 VisitTemporary(HTemporary* temp) argument
3508 VisitTemporary(HTemporary* temp) argument
3965 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
4071 GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Register temp) argument
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H A Dcode_generator_arm64.cc456 // Allocate from VIXL temp registers.
490 Register temp = temps.AcquireX(); local
492 __ Sub(temp, sp, static_cast<int32_t>(GetStackOverflowReservedBytes(kArm64)));
493 __ Ldr(wzr, MemOperand(temp, 0));
558 Register temp = (instruction->IsIntConstant() || instruction->IsNullConstant()) local
561 __ Mov(temp, value);
562 __ Str(temp, StackOperandFrom(location));
609 Register temp = temps.AcquireW(); // Index within the CardTable - 32bit. local
613 __ Lsr(temp, object, gc::accounting::CardTable::kCardShift);
614 __ Strb(card, MemOperand(card, temp
789 CPURegister temp; local
807 FPRegister temp = destination.IsDoubleStackSlot() ? temps.AcquireD() : temps.AcquireS(); local
889 Register temp = dst.Is64Bits() ? temps.AcquireX() : temps.AcquireW(); local
892 __ Fmov(FPRegister(dst), temp); local
958 Register temp = src.Is64Bits() ? temps.AcquireX() : temps.AcquireW(); local
994 Register temp = temps.AcquireW(); local
1054 Register temp = temps.AcquireW(); local
1344 Register temp = temps.AcquireSameSizeAs(obj); local
1414 Register temp = temps.AcquireSameSizeAs(obj); local
1942 Register temp = XRegisterFrom(invoke->GetLocations()->GetTemp(0)); local
2006 GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Register temp) argument
2058 Register temp = XRegisterFrom(invoke->GetLocations()->GetTemp(0)); local
2070 Register temp = XRegisterFrom(invoke->GetLocations()->GetTemp(0)); local
2486 Register temp = temps.AcquireSameSizeAs(output); local
2620 VisitTemporary(HTemporary* temp) argument
2624 VisitTemporary(HTemporary* temp) argument
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H A Dcode_generator_mips64.cc861 GpuRegister temp = TMP; local
867 __ Dsrl(temp, object, gc::accounting::CardTable::kCardShift);
868 __ Daddu(temp, card, temp);
869 __ Sb(card, temp, 0);
2325 GpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<GpuRegister>(); local
2336 // temp = object->GetClass();
2338 __ LoadFromOffset(kLoadUnsignedWord, temp, SP, receiver.GetStackIndex());
2339 __ LoadFromOffset(kLoadUnsignedWord, temp, temp, class_offse
2377 GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, GpuRegister temp) argument
2441 GpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<GpuRegister>(); local
2451 GpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<GpuRegister>(); local
3022 VisitTemporary(HTemporary* temp) argument
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H A Dcode_generator_x86.cc1277 Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); local
1283 // temp = object->GetClass();
1285 __ movl(temp, Address(ESP, receiver.GetStackIndex()));
1286 __ movl(temp, Address(temp, class_offset));
1288 __ movl(temp, Address(receiver.AsRegister<Register>(), class_offset));
1291 // temp = temp->GetMethodAt(method_offset);
1292 __ movl(temp, Address(temp, method_offse
1309 Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); local
1697 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
1722 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
2722 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
3196 GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Register temp) argument
3231 MarkGCCard(Register temp, Register card, Register object, Register value) argument
3307 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
3456 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
3819 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
3965 VisitTemporary(HTemporary* temp) argument
3969 VisitTemporary(HTemporary* temp) argument
4115 Register temp = static_cast<Register>(ensure_scratch.GetRegister()); local
4446 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
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H A Dcode_generator_x86_64.cc38 // Some x86_64 instructions require a register to be available as temp.
363 CpuRegister temp) {
374 // temp = thread->string_init_entrypoint
375 __ gs()->movq(temp, Address::Absolute(invoke->GetStringInitOffset(), true));
376 // (temp + offset_of_quick_compiled_code)()
377 __ call(Address(temp, ArtMethod::EntryPointFromQuickCompiledCodeOffset(
380 // temp = method;
381 LoadCurrentMethod(temp);
383 // temp = temp
362 GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, CpuRegister temp) argument
1386 CpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<CpuRegister>(); local
1418 CpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<CpuRegister>(); local
1790 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
1815 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
1860 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
1885 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
3331 CpuRegister temp = locations->GetTemp(0).AsRegister<CpuRegister>(); local
3673 CpuRegister temp = locations->GetTemp(0).AsRegister<CpuRegister>(); local
3817 MarkGCCard(CpuRegister temp, CpuRegister card, CpuRegister object, CpuRegister value) argument
3832 VisitTemporary(HTemporary* temp) argument
3836 VisitTemporary(HTemporary* temp) argument
4284 CpuRegister temp = locations->GetTemp(0).AsRegister<CpuRegister>(); local
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H A Dintrinsics_arm.cc658 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
660 codegen->MarkGCCard(temp, card, base, value);
799 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
810 __ ldr(temp, Address(obj, count_offset.Int32Value())); // temp = str.length.
812 __ cmp(idx, ShifterOperand(temp));
824 // The inputs plus one temp.
913 // Need a temp for slow-path codepoint compare, and need to send start-index=0.
933 // Need a temp for slow-path codepoint compare.
H A Dintrinsics_arm64.cc856 // This needs to be before the temp registers, as MarkGCCard also uses VIXL temps.
943 Register temp = temps.AcquireW(); local
954 __ Ldr(temp, HeapOperand(obj, count_offset)); // temp = str.length.
956 __ Cmp(idx, temp);
1053 // Need a temp for slow-path codepoint compare, and need to send start_index=0.
1073 // Need a temp for slow-path codepoint compare.
1131 // The inputs plus one temp.
H A Dintrinsics_x86.cc198 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
199 __ movsd(temp, input.AsFpuRegister<XmmRegister>());
200 __ movd(output.AsRegisterPairLow<Register>(), temp);
201 __ psrlq(temp, Immediate(32));
202 __ movd(output.AsRegisterPairHigh<Register>(), temp);
409 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
410 DCHECK_EQ(temp, EDX);
440 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
443 __ movl(temp, input_hi);
444 __ sarl(temp, Immediat
629 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
1343 XmmRegister temp = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); local
1643 SwapBits(Register reg, Register temp, int32_t shift, int32_t mask, X86Assembler* assembler) argument
1661 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
1694 Register temp = locations->GetTemp(0).AsRegister<Register>(); local
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H A Dintrinsics_x86_64.cc799 // The inputs plus one temp.
1329 // Need temp registers for card-marking.
1432 // Need temp registers for card-marking.
1506 static void SwapBits(CpuRegister reg, CpuRegister temp, int32_t shift, int32_t mask, argument
1510 __ movl(temp, reg);
1512 __ andl(temp, imm_mask);
1514 __ shll(temp, imm_shift);
1515 __ orl(reg, temp);
1524 CpuRegister temp = locations->GetTemp(0).AsRegister<CpuRegister>(); local
1536 SwapBits(reg, temp,
1551 SwapBits64(CpuRegister reg, CpuRegister temp, CpuRegister temp_mask, int32_t shift, int64_t mask, X86_64Assembler* assembler) argument
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H A Dnodes.h620 HBasicBlock* temp = predecessors_.Get(0); local
622 predecessors_.Put(1, temp);
627 HBasicBlock* temp = successors_.Get(0); local
629 successors_.Put(1, temp);
H A Dregister_allocator.cc209 Location temp = locations->GetTemp(i); local
210 if (temp.IsRegister() || temp.IsFpuRegister()) {
211 BlockRegister(temp, position, position + 1);
213 DCHECK(temp.IsUnallocated());
214 switch (temp.GetPolicy()) {
241 << temp.GetPolicy();
392 // Don't add directly to `unhandled`, temp or safepoint intervals
454 LiveInterval* temp = temp_intervals_.Get(i); local
455 if (ShouldProcess(processing_core_registers_, temp)) {
1775 LiveInterval* temp = temp_intervals_.Get(i); local
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H A Dssa_builder.cc567 void SsaBuilder::VisitTemporary(HTemporary* temp) { argument
569 temp->GetBlock()->RemoveInstruction(temp);
/art/compiler/utils/arm64/
H A Dassembler_arm64.cc85 // temp = rd + value
86 // rd = cond ? temp : rn
89 vixl::Register temp = temps.AcquireX(); local
90 ___ Add(temp, reg_x(rn), value);
91 ___ Csel(reg_x(rd), temp, reg_x(rd), cond); local
184 vixl::Register temp = temps.AcquireX(); local
185 ___ Mov(temp, reg_x(SP));
186 ___ Str(temp, MEM_OP(reg_x(ETR), tr_offs.Int32Value()));
204 // temp = value
205 // rd = cond ? temp
209 vixl::Register temp = temps.AcquireX(); local
211 ___ Csel(reg_x(dest), temp, reg_x(dest), cond); local
621 vixl::Register temp = temps.AcquireX(); local
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