/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI = local 156 NewMI->setIsInsideBundle(Chan != 0); 157 TII->addFlag(NewMI, 0, Flags);
|
H A D | R600ISelLowering.cpp | 64 MachineInstr *NewMI = local 70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP); 75 MachineInstr *NewMI = local 81 TII->addFlag(NewMI, 1, MO_FLAG_ABS); 87 MachineInstr *NewMI = local 93 TII->addFlag(NewMI, 1, MO_FLAG_NEG); 206 MachineInstr *NewMI = local 212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH); 220 MachineInstr *NewMI = local 226 TII->addFlag(NewMI, [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 281 MCInst NewMI; local 283 NewMI.setOpcode(Opcode); 286 NewMI.addOperand(MI->getOperand(0)); 289 NewMI.addOperand(NewReg); 291 // Copy the rest operands into NewMI. 293 NewMI.addOperand(MI->getOperand(i)); 294 printInstruction(&NewMI, STI, O);
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandPredSpillCode.cpp | 109 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(), local 111 NewMI->addOperand(Op0); 112 NewMI->addOperand(Op1); 113 NewMI->addOperand(Op4); 114 NewMI->addOperand(MachineOperand::CreateReg(Hexagon::M0, 118 NewMI->addOperand(Op2); 152 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(), local 154 NewMI->addOperand(Op1); 155 NewMI->addOperand(Op0); 156 NewMI 193 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(), local 230 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(), local [all...] |
H A D | HexagonNewValueJump.cpp | 591 MachineInstr *NewMI; local 602 NewMI = BuildMI(*MBB, jmpPos, dl, 613 NewMI = BuildMI(*MBB, jmpPos, dl, 619 NewMI = BuildMI(*MBB, jmpPos, dl, 625 assert(NewMI && "New Value Jump Instruction Not created!"); 626 (void)NewMI;
|
H A D | HexagonVLIWPacketizer.cpp | 765 MachineInstr *NewMI = local 767 bool ResourcesAvailable = ResourceTracker->canReserveResources(NewMI); 768 MI->getParent()->getParent()->DeleteMachineInstr(NewMI);
|
/external/llvm/include/llvm/CodeGen/ |
H A D | LiveIntervalAnalysis.h | 256 void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr *NewMI) { argument 257 Indexes->replaceMachineInstrInMaps(MI, NewMI);
|
/external/llvm/lib/Target/R600/ |
H A D | R600ExpandSpecialInstrs.cpp | 37 void SetFlagInNewMI(MachineInstr *NewMI, const MachineInstr *OldMI, 59 void R600ExpandSpecialInstrsPass::SetFlagInNewMI(MachineInstr *NewMI, argument 64 TII->setImmOperand(NewMI, Op, Val); 327 MachineInstr *NewMI = local 331 NewMI->bundleWithPred(); 333 TII->addFlag(NewMI, 0, MO_FLAG_MASK); 336 TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST); 338 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::clamp); 339 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::literal); 340 SetFlagInNewMI(NewMI, [all...] |
H A D | AMDILCFGStructurizer.cpp | 509 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL); local 510 MBB->insert(I, NewMI); 511 MachineInstrBuilder MIB(*MF, NewMI); 513 SHOWNEWINSTR(NewMI); 1738 MachineInstr *NewMI = insertInstrBefore(I, AMDGPU::BRANCH_COND_i32); local 1739 MachineInstrBuilder MIB(*FuncRep, NewMI); 1742 SHOWNEWINSTR(NewMI);
|
H A D | R600ISelLowering.cpp | 209 MachineInstrBuilder NewMI; local 216 NewMI = BuildMI(*BB, I, BB->findDebugLoc(I), 219 NewMI.addOperand(MI->getOperand(i)); 226 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local 230 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP); 235 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local 239 TII->addFlag(NewMI, 0, MO_FLAG_ABS); 244 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local 248 TII->addFlag(NewMI, 0, MO_FLAG_NEG); 270 MachineInstr *NewMI local 498 MachineInstr *NewMI = local 512 MachineInstr *NewMI = local [all...] |
H A D | R600InstrInfo.cpp | 74 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV, local 76 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0))
|
/external/llvm/lib/Target/X86/ |
H A D | X86FixupLEAs.cpp | 100 MachineInstr *NewMI; local 106 NewMI = BuildMI(*MF, MI->getDebugLoc(), 115 MFI->insert(MBBI, NewMI); // Insert the new inst 116 return NewMI; 250 MachineInstr *NewMI = postRAConvertToLEA(MFI, MBI); local 251 if (NewMI) { 255 DEBUG(dbgs() << "FixLEA: Replaced by: "; NewMI->dump();); 258 static_cast<MachineBasicBlock::iterator>(NewMI); 300 MachineInstr *NewMI = nullptr; local 306 NewMI [all...] |
H A D | X86InstrInfo.cpp | 2443 MachineInstr *NewMI = std::prev(I); local 2444 NewMI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI); 2640 MachineInstr *NewMI = MIB; local 2648 LV->getVarInfo(leaInReg).Kills.push_back(NewMI); 2686 MachineInstr *NewMI = nullptr; local 2707 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r)) 2734 NewMI = MIB; 2745 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r)) 2768 NewMI = addOffset(MIB, 1); 2776 NewMI 4706 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), local 4732 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 386 MachineInstr *NewMI = MRI->getVRegDef(Reg); local 387 if (!NewMI) 389 Front.push_back(NewMI); 394 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); local 395 if (!NewMI) 397 Front.push_back(NewMI);
|
H A D | ARMFrameLowering.cpp | 723 MachineInstr *NewMI = std::prev(MBBI); local 725 NewMI->addOperand(MBBI->getOperand(i)); 729 MBBI = NewMI;
|
H A D | ARMBaseInstrInfo.cpp | 250 MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; local 252 LV->addVirtualRegisterDead(Reg, NewMI); 257 MachineInstr *NewMI = NewMIs[j]; local 258 if (!NewMI->readsRegister(Reg)) 260 LV->addVirtualRegisterKilled(Reg, NewMI); 262 VI.Kills.push_back(NewMI); 1758 ARMBaseInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1768 MI = TargetInstrInfo::commuteInstruction(MI, NewMI); 1777 return TargetInstrInfo::commuteInstruction(MI, NewMI); 1863 MachineInstrBuilder NewMI [all...] |
/external/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 682 MachineInstr *NewMI) { 684 std::replace(VI.Kills.begin(), VI.Kills.end(), OldMI, NewMI); 681 replaceKillInstruction(unsigned Reg, MachineInstr *OldMI, MachineInstr *NewMI) argument
|
H A D | MachineCSE.cpp | 481 MachineInstr *NewMI = TII->commuteInstruction(MI); local 482 if (NewMI) { 484 FoundCSE = VNT.count(NewMI); 485 if (NewMI != MI) { 487 NewMI->eraseFromParent();
|
H A D | TailDuplication.cpp | 433 MachineInstr *NewMI = TII->duplicate(MI, MF); local 434 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) { 435 MachineOperand &MO = NewMI->getOperand(i); 456 PredBB->insert(PredBB->instr_end(), NewMI);
|
H A D | TargetInstrInfo.cpp | 123 bool NewMI) const { 159 if (NewMI) { 409 MachineInstr *NewMI = local 411 MachineInstrBuilder MIB(MF, NewMI); 437 return NewMI; 460 MachineInstr *NewMI = nullptr; local 465 NewMI = foldPatchpoint(MF, MI, Ops, FI, *this); 468 NewMI =foldMemoryOperandImpl(MF, MI, Ops, FI); 471 if (NewMI) { 472 NewMI 526 MachineInstr *NewMI = nullptr; local [all...] |
H A D | TwoAddressInstructionPass.cpp | 653 MachineInstr *NewMI = TII->commuteInstruction(MI); local 655 if (NewMI == nullptr) { 660 DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI); 661 assert(NewMI == MI && 701 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV); local 703 if (!NewMI) 707 DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI); 711 LIS->ReplaceMachineInstrInMaps(mi, NewMI); 713 if (NewMI->findRegisterUseOperand(RegB, false, TRI)) 717 Sunk = sink3AddrInstruction(NewMI, Reg 1295 MachineBasicBlock::iterator NewMI = NewMIs[1]; local [all...] |
H A D | RegisterCoalescer.cpp | 696 MachineInstr *NewMI = TII->commuteInstruction(DefMI); local 697 if (!NewMI) 703 if (NewMI != DefMI) { 704 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI); 706 MBB->insert(Pos, NewMI); 930 MachineInstr *NewMI = std::prev(MII); local 932 LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI); 936 // NewMI may have dead implicit defs (E.g. EFLAGS for MOV<bits>r0 on X86). 938 // NewMI into SlotIndexes. 940 for (unsigned i = NewMI [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 658 // instruction OldMI with three-address instruction NewMI. 660 MachineInstr *NewMI, 667 LV->replaceKillInstruction(Op.getReg(), OldMI, NewMI); 670 return NewMI; 659 finishConvertToThreeAddress(MachineInstr *OldMI, MachineInstr *NewMI, LiveVariables *LV) argument
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 531 MachineInstr *NewMI = local 535 EntryMBB->insertAfter(Pos, NewMI);
|
/external/clang/lib/Serialization/ |
H A D | ASTReader.cpp | 1947 static bool areDefinedInSystemModules(MacroInfo *PrevMI, MacroInfo *NewMI, argument 1949 assert(PrevMI && NewMI); 1959 SrcMgr.isInSystemHeader(NewMI->getDefinitionLoc()); 2069 MacroInfo *NewMI = Prev->back()->getInfo(); local 2071 MD = PP.AllocateDefMacroDirective(NewMI, ImportLoc); 2081 MacroInfo *NewMI = MD->getInfo(); local 2082 assert(NewMI && "macro definition with no MacroInfo?"); 2096 if (NewMI != PrevMI && 2097 !PrevMI->isIdenticalTo(*NewMI, PP, /*Syntactically=*/true) && 2098 !areDefinedInSystemModules(PrevMI, NewMI, Owne [all...] |