Searched refs:AlignedAddr (Results 1 - 5 of 5) sorted by relevance

/external/clang/test/CodeGen/
H A Darm-vector-align.c14 typedef float AlignedAddr __attribute__ ((aligned (16))); typedef
15 void t1(AlignedAddr *addr1, AlignedAddr *addr2) {
/external/llvm/include/llvm/Support/
H A DAllocator.h233 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); local
234 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize);
235 char *AlignedPtr = (char*)AlignedAddr;
242 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); local
243 assert(AlignedAddr + Size <= (uintptr_t)End &&
245 char *AlignedPtr = (char*)AlignedAddr;
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1159 unsigned AlignedAddr = RegInfo.createVirtualRegister(RC); local
1211 BuildMI(BB, DL, TII->get(Mips::AND), AlignedAddr)
1250 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
1275 .addReg(StoreVal).addReg(AlignedAddr).addImm(0);
1394 unsigned AlignedAddr = RegInfo.createVirtualRegister(RC); local
1453 BuildMI(BB, DL, TII->get(Mips::AND), AlignedAddr)
1484 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
1502 .addReg(StoreVal).addReg(AlignedAddr).addImm(0);
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2508 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, local
2537 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift,
2612 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, local
2628 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,
/external/clang/lib/CodeGen/
H A DTargetInfo.cpp5773 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP);
5778 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset),

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