/external/llvm/lib/Target/R600/ |
H A D | SILoadStoreOptimizer.cpp | 67 unsigned EltSize); 70 unsigned EltSize); 79 unsigned EltSize); 84 unsigned EltSize); 163 unsigned EltSize){ 189 if (offsetsCanBeCombined(Offset0, Offset1, EltSize)) 210 unsigned EltSize) { 227 unsigned NewOffset0 = Offset0 / EltSize; 228 unsigned NewOffset1 = Offset1 / EltSize; 229 unsigned Opc = (EltSize 162 findMatchingDSInst(MachineBasicBlock::iterator I, unsigned EltSize) argument 207 mergeRead2Pair( MachineBasicBlock::iterator I, MachineBasicBlock::iterator Paired, unsigned EltSize) argument 294 mergeWrite2Pair( MachineBasicBlock::iterator I, MachineBasicBlock::iterator Paired, unsigned EltSize) argument [all...] |
H A D | SIInstrInfo.cpp | 222 unsigned EltSize; local 224 EltSize = getOpRegClass(*LdSt, 0)->getSize() / 2; 228 EltSize = getOpRegClass(*LdSt, Data0Idx)->getSize(); 232 EltSize *= 64; 237 Offset = EltSize * Offset0;
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H A D | AMDGPUISelLowering.cpp | 724 unsigned EltSize = TD->getTypeAllocSize(SeqTy->getElementType()); local 727 SDValue Offset = DAG.getConstant(i * EltSize, PtrVT); 1344 unsigned EltSize = MemEltVT.getStoreSize(); local 1356 SrcValue.getWithOffset(i * EltSize),
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/external/llvm/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 423 unsigned EltSize = In->getPrimitiveSizeInBits()/8; local 424 if (EltSize == AllocaSize) 430 if (Offset % EltSize == 0 && AllocaSize % EltSize == 0 && 431 (!VectorTy || EltSize == VectorTy->getElementType() 435 VectorTy = VectorType::get(In, AllocaSize/EltSize); 788 unsigned EltSize = DL.getTypeAllocSizeInBits(VTy->getElementType()); local 789 Elt = Offset/EltSize; 790 assert(EltSize*Elt == Offset && "Invalid modulus in validity checking"); 828 uint64_t EltSize local 925 uint64_t EltSize = DL.getTypeAllocSizeInBits(EltTy); local 957 uint64_t EltSize = DL.getTypeAllocSizeInBits(AT->getElementType()); local 1847 uint64_t EltSize; local 2037 uint64_t EltSize = DL.getTypeAllocSize(T); local 2045 uint64_t EltSize = DL.getTypeAllocSize(T); local 2140 uint64_t EltSize = DL.getTypeAllocSize(IdxTy) - NewOffset; local 2156 uint64_t EltSize = DL.getTypeAllocSize(IdxTy); local 2293 unsigned EltSize = DL.getTypeSizeInBits(ValTy); local 2323 unsigned EltSize = DL.getTypeAllocSize(EltTy); local [all...] |
/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 333 uint64_t EltSize = DL.getTypeAllocSize(CS->getOperand(Index)->getType()); local 335 if (ByteOffset < EltSize && 364 uint64_t EltSize = DL.getTypeAllocSize(EltTy); local 365 uint64_t Index = ByteOffset / EltSize; 366 uint64_t Offset = ByteOffset - Index * EltSize; 378 uint64_t BytesWritten = EltSize - Offset; 379 assert(BytesWritten <= EltSize && "Not indexing into this element?");
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 2077 unsigned EltSize = Size / NElts; local 2079 uint64_t Mask = ~uint64_t(0ULL) >> (64 - EltSize); 2097 Res = (Res << EltSize) | Val; 2211 int EltSize = EltVT.getSizeInBits(); local 2213 EltSize : VTN * EltSize, MVT::i64); 2217 SDValue Offset = DAG.getConstant(C->getZExtValue() * EltSize, MVT::i32); 2270 DAG.getConstant(EltSize, MVT::i32)); 2299 int EltSize = EltVT.getSizeInBits(); local 2301 EltSize [all...] |
/external/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 102 uint64_t EltSize = TLI.getDataLayout()->getTypeAllocSize(EltTy); local 105 StartingOffset + i * EltSize);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 268 /// VRRC = VADD_SPLAT Elt, EltSize - Temporary node to be expanded 378 bool isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize); 382 unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize, SelectionDAG &DAG);
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H A D | PPCISelLowering.cpp | 1266 bool PPC::isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize) { argument 1268 (EltSize == 1 || EltSize == 2 || EltSize == 4)); 1280 for (unsigned i = 1; i != EltSize; ++i) 1284 for (unsigned i = EltSize, e = 16; i != e; i += EltSize) { 1286 for (unsigned j = 0; j != EltSize; ++j) 1295 unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize, argument 1298 assert(isSplatShuffleMask(SVOp, EltSize)); 1316 unsigned EltSize = 16/N->getNumOperands(); local 6718 SDValue EltSize = DAG.getConstant(SplatSize, MVT::i32); local [all...] |
H A D | PPCISelDAGToDAG.cpp | 2910 int EltSize = N->getConstantOperandVal(1); local 2914 if (EltSize == 1) { 2919 } else if (EltSize == 2) { 2925 assert(EltSize == 4 && "Invalid element size on VADD_SPLAT!");
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/external/clang/lib/CodeGen/ |
H A D | TargetInfo.cpp | 1980 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1986 if (Size > 128 && EltSize != 256) 1989 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 2235 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 2241 unsigned EltOffset = i*EltSize; 2323 unsigned EltSize = TD.getTypeAllocSize(EltTy); 2324 IROffset -= IROffset/EltSize*EltSize; 2412 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 2413 unsigned EltOffset = IROffset/EltSize*EltSiz [all...] |
H A D | CGBuiltin.cpp | 1941 int EltSize = VTy->getScalarSizeInBits(); local 1947 if (ShiftAmt == EltSize) {
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.cpp | 1012 unsigned EltSize = EltVT.getSizeInBits() / 8; // FIXME: should be ABI size. local 1015 DAG.getConstant(EltSize, Index.getValueType()));
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H A D | LegalizeDAG.cpp | 598 unsigned EltSize = EltVT.getSizeInBits()/8; local 599 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT)); 1437 unsigned EltSize = 1440 DAG.getConstant(EltSize, Idx.getValueType())); 1489 unsigned EltSize = 1493 DAG.getConstant(EltSize, Idx.getValueType()));
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H A D | SelectionDAG.cpp | 122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); local 124 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); local 168 if (CN->getAPIntValue().countTrailingZeros() < EltSize) 171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
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H A D | DAGCombiner.cpp | 12737 unsigned EltSize = (unsigned)TD.getTypeAllocSize(Elts[0]->getType()); local 12738 SDValue One = DAG.getIntPtrConstant(EltSize);
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/external/clang/lib/AST/ |
H A D | ExprConstant.cpp | 1589 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); local 1607 Res |= EltAsInt.zextOrTrunc(VecSize).rotr(i*EltSize+BaseEltSize); 1609 Res |= EltAsInt.zextOrTrunc(VecSize).rotl(i*EltSize); 5567 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); local 5572 unsigned FloatEltSize = EltSize; 5578 Elt = SValInt.rotl(i*EltSize+FloatEltSize).trunc(FloatEltSize); 5580 Elt = SValInt.rotr(i*EltSize).trunc(FloatEltSize); 5587 Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize); [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 5062 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 5066 if (hasDominantValue && EltSize <= 32) { 5146 if (EltSize >= 32) { 5149 EVT EltVT = EVT::getFloatingPointVT(EltSize); 5351 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 5352 return (EltSize >= 32 || 5499 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 5500 if (EltSize <= 32) { 5600 if (EltSize >= 32) { 5603 EVT EltVT = EVT::getFloatingPointVT(EltSize); 5715 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 5842 unsigned EltSize = VT.getVectorElementType().getSizeInBits() / 2; local 9064 unsigned EltSize = Op.getValueType().getVectorElementType().getSizeInBits(); local [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 854 unsigned EltSize = Ty.getVectorElementType().getSizeInBits(); local 862 EltSize, !Subtarget.isLittle()) || 863 (SplatBitSize != EltSize) || 864 (SplatValue.getZExtValue() >= EltSize))
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstructionCombining.cpp | 916 uint64_t EltSize = DL.getTypeAllocSize(AT->getElementType()); local 917 assert(EltSize && "Cannot index into a zero-sized array"); 918 NewIndices.push_back(ConstantInt::get(IntPtrTy,Offset/EltSize)); 919 Offset %= EltSize;
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/external/llvm/lib/IR/ |
H A D | Constants.cpp | 2789 unsigned EltSize = getElementByteSize(); local 2791 if (memcmp(Base, Base+i*EltSize, EltSize))
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/external/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 522 uint64_t EltSize = DL.getTypeAllocSize(STy->getElementType()); local 539 unsigned NewAlign = (unsigned)MinAlign(StartAlignment, EltSize*i);
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/external/llvm/lib/Transforms/Instrumentation/ |
H A D | MemorySanitizer.cpp | 832 uint32_t EltSize = DL.getTypeSizeInBits(VT->getElementType()); local 833 return VectorType::get(IntegerType::get(*MS.C, EltSize),
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1770 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 1771 unsigned HalfSize = EltSize / 2; 1796 unsigned EltSize = VT.getVectorElementType().getSizeInBits() / 2; local 1798 MVT TruncVT = MVT::getIntegerVT(EltSize); 6250 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 6257 if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) 6267 Cnt < EltSize) {
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1384 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 1397 if ( EltSize >= 32) { 1445 const unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local 1451 if (EltSize < 32) { 20597 unsigned EltSize = ElementType.getSizeInBits() / 8; 20601 uint64_t Offset = EltSize * i;
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