| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 775 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
801 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator in enum:llvm::ISD::CondCode
813 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUISelLowering.cpp | 236 ISD::SETGE);
242 ISD::SETGE);
|
| /external/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 190 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
204 case ICmpInst::ICMP_SGE: return ISD::SETGE;
|
| H A D | TargetLoweringBase.cpp | 715 CCs[RTLIB::OGE_F32] = ISD::SETGE;
716 CCs[RTLIB::OGE_F64] = ISD::SETGE;
717 CCs[RTLIB::OGE_F128] = ISD::SETGE;
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86IntrinsicsInfo.h | 507 X86_INTRINSIC_DATA(sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE),
547 X86_INTRINSIC_DATA(sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE),
580 X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE),
589 X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE),
|
| H A D | X86ISelLowering.cpp | 3658 case ISD::SETGE: return X86::COND_GE;
3703 case ISD::SETGE: return X86::COND_AE;
12937 case ISD::SETGE: Swap = true; // Fallthrough
13013 case ISD::SETGE: Swap = true; SSECC = 2; break; // LE + swap
13137 case ISD::SETGE: Swap = true;
20693 case ISD::SETGE:
20711 case ISD::SETGE:
20849 case ISD::SETGE:
20883 case ISD::SETGE:
21055 ISD::CondCode NewCC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGE;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 323 case ISD::SETGE: return "setge";
|
| H A D | TargetLowering.cpp | 140 case ISD::SETGE:
1424 case ISD::SETGE:
1587 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
1591 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT;
1619 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal)
2005 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y
|
| H A D | LegalizeIntegerTypes.cpp | 928 case ISD::SETGE:
2073 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE);
2074 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE);
2079 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE);
2605 case ISD::SETGE:
2638 (CCCode == ISD::SETLE || CCCode == ISD::SETGE ||
|
| H A D | LegalizeDAG.cpp | 1732 case ISD::SETGE:
3643 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE);
3644 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE);
3649 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE);
|
| H A D | SelectionDAG.cpp | 307 case ISD::SETGE: return 1;
1878 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1909 case ISD::SETGE: if (R==APFloat::cmpUnordered)
|
| H A D | DAGCombiner.cpp | 4735 case ISD::SETGE:
5173 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) ||
12690 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
12925 if (((N1C->isNullValue() && (CC == ISD::SETGT || CC == ISD::SETGE)) ||
|
| H A D | LegalizeFloatTypes.cpp | 1515 ISD::SETGE);
|
| /external/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 591 case ISD::SETGE:
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2048 case ISD::SETGE: return PPC::PRED_GE;
2072 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE
2100 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break;
2132 case ISD::SETGE:
2146 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break;
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1223 case ISD::SETGE: return ARMCC::GE;
1243 case ISD::SETGE:
3158 case ISD::SETGE:
3174 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE;
3527 if (CC == ISD::SETGT || CC == ISD::SETGE)
3534 if (CC == ISD::SETGT || CC == ISD::SETGE)
4091 SDValue Cmp = getARMCmp(ExtraShAmt, DAG.getConstant(0, MVT::i32), ISD::SETGE,
4125 SDValue Cmp = getARMCmp(ExtraShAmt, DAG.getConstant(0, MVT::i32), ISD::SETGE,
4374 case ISD::SETGE: Opc = ARMISD::VCGE; break;
4407 case ISD::SETGE
[all...] |
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 287 setCondCodeAction(ISD::SETGE, Ty, Expand);
327 setCondCodeAction(ISD::SETGE, Ty, Expand);
960 case ISD::SETGE: return IsV216;
995 // SETGT/SETGE/SETUGT/SETUGE variants of these will show up initially but
|
| H A D | MipsISelLowering.cpp | 500 case ISD::SETGE:
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 867 case ISD::SETGE:
|
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.cpp | 1130 case ISD::SETGE:
1172 case ISD::SETGE: {
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1004 case ISD::SETGE:
1037 case ISD::SETGE:
1176 case ISD::SETGE:
1202 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE;
3709 case ISD::SETGE:
4130 ISD::SETGE, dl, DAG);
4177 ISD::SETGE, dl, DAG);
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1703 DAG.getConstant(VTBits, MVT::i32), ISD::SETGE);
1763 DAG.getConstant(VTBits, MVT::i32), ISD::SETGE);
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1333 case ISD::SETGE: return SPCC::ICC_GE;
1356 case ISD::SETGE:
|
| /external/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 620 #define SETGE(a) CHOICE(setge a, setge a, setge a) macro
1341 #define SETGE(a) setge a macro
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1662 else if (Cond == ISD::SETGE || Cond == ISD::SETUGE)
|