/external/llvm/lib/Target/R600/ |
H A D | R600ClauseMergePass.cpp | 77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); 83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); 124 if (LatrCFAlu->getOperand(Mode0Idx).getImm() && 125 RootCFAlu->getOperand(Mode0Idx).getImm() && 126 (LatrCFAlu->getOperand(KBank0Idx).getImm() != 127 RootCFAlu->getOperand(KBank0Idx).getImm() || 128 LatrCFAlu->getOperand(KBank0LineIdx).getImm() != 129 RootCFAlu->getOperand(KBank0LineIdx).getImm())) { 140 if (LatrCFAlu->getOperand(Mode1Idx).getImm() && 141 RootCFAlu->getOperand(Mode1Idx).getImm() [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMOptimizeBarriersPass.cpp | 68 if (MI.getOperand(0).getImm() == DMBType) { 73 DMBType = MI.getOperand(0).getImm(); 78 DMBType = MI.getOperand(0).getImm();
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/external/llvm/lib/MC/ |
H A D | MCInstrAnalysis.cpp | 19 int64_t Imm = Inst.getOperand(0).getImm();
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/external/llvm/lib/Target/SystemZ/InstPrinter/ |
H A D | SystemZInstPrinter.cpp | 38 O << MO.getImm(); 58 int64_t Value = MI->getOperand(OpNum).getImm(); 65 int64_t Value = MI->getOperand(OpNum).getImm(); 72 int64_t Value = MI->getOperand(OpNum).getImm(); 79 int64_t Value = MI->getOperand(OpNum).getImm(); 86 int64_t Value = MI->getOperand(OpNum).getImm(); 93 int64_t Value = MI->getOperand(OpNum).getImm(); 100 int64_t Value = MI->getOperand(OpNum).getImm(); 107 int64_t Value = MI->getOperand(OpNum).getImm(); 114 uint64_t Value = MI->getOperand(OpNum).getImm(); [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | R600MCCodeEmitter.cpp | 101 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset 110 int64_t Sampler = MI.getOperand(14).getImm(); 113 MI.getOperand(2).getImm(), 114 MI.getOperand(3).getImm(), 115 MI.getOperand(4).getImm(), 116 MI.getOperand(5).getImm() 119 MI.getOperand(6).getImm() & 0x1F, 120 MI.getOperand(7).getImm() & 0x1F, 121 MI.getOperand(8).getImm() & 0x1F 181 return MO.getImm(); [all...] |
/external/llvm/lib/Target/R600/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 32 O << formatHex(MI->getOperand(OpNo).getImm() & 0xff); 37 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffff); 42 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); 47 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); 52 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); 57 if (MI->getOperand(OpNo).getImm()) 63 if (MI->getOperand(OpNo).getImm()) 69 if (MI->getOperand(OpNo).getImm()) 75 if (MI->getOperand(OpNo).getImm()) { 83 uint16_t Imm = MI->getOperand(OpNo).getImm(); [all...] |
/external/llvm/lib/Target/MSP430/InstPrinter/ |
H A D | MSP430InstPrinter.cpp | 39 O << Op.getImm(); 53 O << '#' << Op.getImm(); 81 O << Disp.getImm(); 91 unsigned CC = MI->getOperand(OpNo).getImm();
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/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 79 switch (MI->getOperand(0).getImm()) { 120 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); 131 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); 142 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); 151 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { 157 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); 180 MI->getOperand(3).getImm() == -4) { 209 MI->getOperand(4).getImm() == 4) { 304 MI->getOperand(0).getImm() == 0 && 326 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << marku [all...] |
/external/llvm/lib/Target/X86/InstPrinter/ |
H A D | X86ATTInstPrinter.cpp | 74 int64_t Imm = MI->getOperand(Op).getImm(); 114 int64_t Imm = MI->getOperand(Op).getImm(); 130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 146 O << formatImm(Op.getImm()); 169 O << markup("<imm:") << '$' << formatImm((int64_t)Op.getImm()) 176 (Op.getImm() > 255 || Op.getImm() < -256)) 177 *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm()); 201 int64_t DispVal = DispSpec.getImm(); 217 unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm(); [all...] |
H A D | X86IntelInstPrinter.cpp | 56 int64_t Imm = MI->getOperand(Op).getImm(); 96 int64_t Imm = MI->getOperand(Op).getImm(); 112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 127 O << formatImm(Op.getImm()); 150 O << formatImm((int64_t)Op.getImm()); 160 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); 192 int64_t DispVal = DispSpec.getImm(); 245 O << formatImm(DispSpec.getImm()); 256 O << formatImm(MI->getOperand(Op).getImm() & 0xff);
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H A D | X86InstComments.cpp | 136 MI->getOperand(MI->getNumOperands()-1).getImm(),
147 MI->getOperand(MI->getNumOperands()-1).getImm(),
161 MI->getOperand(MI->getNumOperands()-1).getImm(),
172 MI->getOperand(MI->getNumOperands()-1).getImm(),
186 MI->getOperand(MI->getNumOperands()-1).getImm(),
197 MI->getOperand(MI->getNumOperands()-1).getImm(),
209 MI->getOperand(MI->getNumOperands()-1).getImm(),
221 MI->getOperand(MI->getNumOperands()-1).getImm(),
236 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
316 MI->getOperand(MI->getNumOperands()-1).getImm(),
[all...] |
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 220 return static_cast<unsigned>(MO.getImm()); 231 ImmVal = static_cast<uint32_t>(MO.getImm()); 252 return MO.getImm(); 277 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && 279 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); 283 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); 305 return MO.getImm(); 327 return MO.getImm(); 343 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); 344 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); [all...] |
/external/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 57 unsigned char SH = MI->getOperand(2).getImm(); 58 unsigned char MB = MI->getOperand(3).getImm(); 59 unsigned char ME = MI->getOperand(4).getImm(); 90 unsigned char SH = MI->getOperand(2).getImm(); 91 unsigned char ME = MI->getOperand(3).getImm(); 123 unsigned Code = MI->getOperand(OpNo).getImm(); 219 unsigned int Value = MI->getOperand(OpNo).getImm(); 226 unsigned int Value = MI->getOperand(OpNo).getImm(); 233 unsigned int Value = MI->getOperand(OpNo).getImm(); 240 unsigned int Value = MI->getOperand(OpNo).getImm(); [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && 38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && 41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { 42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { 43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { 50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { 57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && 58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { 69 MI.getOperand(1).getImm() != 8) { 353 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm() [all...] |
H A D | ARMMCCodeEmitter.cpp | 194 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); 294 unsigned SoImm = MO.getImm(); 326 return MO.getImm(); 333 unsigned SoImm = MI.getOperand(Op).getImm(); 366 return 64 - MI.getOperand(Op).getImm(); 547 return static_cast<unsigned>(MO.getImm()); 566 int32_t SImm = MO1.getImm(); 594 if (MO.isImm()) return MO.getImm(); 632 return encodeThumbBLOffset(MO.getImm()); 645 return encodeThumbBLOffset(MO.getImm()); [all...] |
/external/llvm/lib/Target/BPF/InstPrinter/ |
H A D | BPFInstPrinter.cpp | 57 O << (int32_t)Op.getImm(); 70 O << formatDec(OffsetOp.getImm()); 83 O << (uint64_t)Op.getImm();
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/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 21 O << Op.getImm();
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 73 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { 76 switch (Op3.getImm()) { 112 int64_t immr = Op2.getImm(); 113 int64_t imms = Op3.getImm(); 143 if (Op2.getImm() > Op3.getImm()) { 146 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; 154 << ", #" << Op2.getImm() << ", #" << Op3.getImm() [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZAsmPrinter.cpp | 35 .addImm(MI->getOperand(1).getImm()); 40 .addImm(MI->getOperand(2).getImm()); 49 .addImm(MI->getOperand(1).getImm()); 54 .addImm(MI->getOperand(2).getImm()); 64 .addImm(MI->getOperand(3).getImm()) 65 .addImm(MI->getOperand(4).getImm()) 66 .addImm(MI->getOperand(5).getImm()); 135 .addImm(MI->getOperand(2).getImm()); 141 .addImm(MI->getOperand(2).getImm()); 238 OS << -int64_t(MI->getOperand(OpNo).getImm()); [all...] |
H A D | SystemZInstrInfo.cpp | 70 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); 73 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm()); 74 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm()); 90 OffsetMO.getImm()); 110 MI->getOperand(1).setImm(uint32_t(MI->getOperand(1).getImm())); 142 MI->getOperand(2).getImm()); 198 MI->getOperand(2).getImm() == 0 && 223 MI->getOperand(1).getImm() != 0 || 225 MI->getOperand(4).getImm() != 0) 229 int64_t Length = MI->getOperand(2).getImm(); [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonCopyToCombine.cpp | 142 bool NotExt = Op1.isImm() && isInt<8>(Op1.getImm()); 171 !isInt<8>(I->getOperand(1).getImm()); 175 !isUInt<6>(I->getOperand(1).getImm()); 566 .addImm(LoOperand.getImm()); 571 .addImm(HiOperand.getImm()) 578 if (!isInt<8>(HiOperand.getImm())) { 579 assert(isInt<8>(LoOperand.getImm())); 581 .addImm(HiOperand.getImm()) 582 .addImm(LoOperand.getImm()); 586 if (!isUInt<6>(LoOperand.getImm())) { [all...] |
/external/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 371 int64_t getImm() const { function in struct:__anon10798::PPCOperand 428 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } 429 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } 430 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } 431 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } 432 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } 433 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } 434 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } 436 isUInt<6>(getImm()) && 437 (getImm() [all...] |
/external/llvm/lib/Target/Sparc/InstPrinter/ |
H A D | SparcInstPrinter.cpp | 68 MI->getOperand(2).getImm() == 8) { 118 O << (int)MO.getImm(); 141 if (MO.isImm() && MO.getImm() == 0) 152 int CC = (int)MI->getOperand(opNum).getImm();
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonInstPrinter.cpp | 146 O << MI->getOperand(OpNo).getImm(); 163 int ImmValue = MO.getImm(); 173 O << MI->getOperand(OpNo).getImm(); 178 O << -MI->getOperand(OpNo).getImm(); 192 O << " + #" << MO1.getImm(); 200 O << getRegisterName(MO0.getReg()) << ", #" << MO1.getImm();
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/external/llvm/lib/Target/Mips/ |
H A D | MipsInstrInfo.cpp | 45 return op.isImm() && op.getImm() == 0; 101 unsigned Opc = Cond[0].getImm(); 109 MIB.addImm(Cond[i].getImm()); 174 Cond[0].setImm(getOppositeBranchOpc(Cond[0].getImm())); 274 return MI->getOperand(2).getImm();
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