Searched refs:v2i32 (Results 1 - 21 of 21) sorted by relevance

/external/clang/test/CodeGen/
H A Dsystemz-abi-vector.c17 typedef __attribute__((vector_size(8))) int v2i32; typedef
66 v2i32 pass_v2i32(v2i32 arg) { return arg; }
H A Dx86_64-arguments.c286 typedef unsigned v2i32 __attribute((__vector_size__(8))); typedef
287 v2i32 f36(v2i32 arg) { return arg; }
/external/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp83 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
84 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
112 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
113 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
137 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
138 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
144 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
145 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
147 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
148 { ISD::FP_TO_UINT, MVT::v2i32, MV
[all...]
H A DARMISelDAGToDAG.cpp1796 case MVT::v2i32: OpcodeIndex = 2; break;
1933 case MVT::v2i32: OpcodeIndex = 2; break;
2096 case MVT::v2i32: OpcodeIndex = 2; break;
2208 case MVT::v2i32: OpcodeIndex = 2; break;
2748 case MVT::v2i32: Opc = ARM::VTRNd32; break;
2768 case MVT::v2i32: Opc = ARM::VTRNd32; break;
2787 case MVT::v2i32: Opc = ARM::VTRNd32; break;
H A DARMISelLowering.cpp154 addTypeForNEON(VT, MVT::f64, MVT::v2i32);
433 addDRTypeForNEON(MVT::v2i32);
543 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom);
575 MVT::v2i32}) {
981 case MVT::v2i32: case MVT::v1i64: case MVT::v2f32:
3882 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32,
3884 EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64;
4060 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32;
4216 /// lowerCTPOP32BitElements - Returns a v2i32/v4i32 vector containing the
4221 /// Trace for v2i32 (v4i3
[all...]
/external/llvm/include/llvm/CodeGen/
H A DMachineValueType.h80 v2i32 = 33, // 2 x i32 enumerator in enum:llvm::MVT::SimpleValueType
218 SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
304 case v2i32:
362 case v2i32:
417 case v2i32:
553 if (NumElements == 2) return MVT::v2i32;
/external/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp192 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
195 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
216 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
219 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
223 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 },
226 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 },
230 // Complex, from v2f32: legal type is v2i32 (no cost) or v2i64 (1 ext).
244 // Complex, from v2f64: legal type is v2i32, 1 narrowing => ~2.
245 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
248 { ISD::FP_TO_UINT, MVT::v2i32, MV
[all...]
H A DAArch64ISelDAGToDAG.cpp469 case MVT::v2i32:
2266 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2284 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2302 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2320 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2338 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2356 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2374 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2392 else if (VT == MVT::v2i32 || VT == MVT::v2f32)
2410 else if (VT == MVT::v2i32 || V
[all...]
H A DAArch64ISelLowering.cpp107 addDRTypeForNEON(MVT::v2i32);
428 // load, floating-point truncating stores, or v2i32->v2i16 truncating store.
567 setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom);
568 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom);
584 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand);
624 AddPromotedToType(ISD::LOAD, VT.getSimpleVT(), MVT::v2i32);
627 AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i32);
692 addTypeForNEON(VT, MVT::v2i32);
1737 return MVT::v2i32;
5381 MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32;
[all...]
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILISelLowering.cpp64 (int)MVT::v2i32,
92 (int)MVT::v2i32,
501 INTTY = MVT::v2i32;
649 INTTY = MVT::v2i32;
667 INTTY = MVT::v2i32;
/external/llvm/lib/IR/
H A DValueTypes.cpp151 case MVT::v2i32: return "v2i32";
219 case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
/external/llvm/lib/Target/R600/
H A DSIISelLowering.cpp51 addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass);
350 return MVT::v2i32;
1024 SDValue LHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(1));
1025 SDValue RHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(2));
1037 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2i32, Lo, Hi);
1160 SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X);
1161 SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y);
1162 SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0);
1163 SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1);
2008 MVT::v2i32, Ops
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H A DAMDGPUISelLowering.cpp151 AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32);
172 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
173 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom);
191 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32);
213 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom);
311 MVT::v2i32, MVT::v4i32
1954 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1969 SDValue SignBit64 = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
2064 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X);
2146 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Sr
[all...]
H A DR600ISelLowering.cpp41 addRegisterClass(MVT::v2i32, &AMDGPU::R600_Reg64RegClass);
68 setOperationAction(ISD::SETCC, MVT::v2i32, Expand);
91 setOperationAction(ISD::SELECT, MVT::v2i32, Expand);
112 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Expand);
120 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
141 setOperationAction(ISD::STORE, MVT::v2i32, Custom);
150 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i32, Custom);
155 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i32, Custom);
H A DAMDGPUISelDAGToDAG.cpp427 // v2i32 loads. Alternatively, we could promote i64 loads to v2i32
436 SDValue NewLoad = CurDAG->getLoad(MVT::v2i32, SDLoc(N), LD->getChain(),
455 MVT::v2i32, Value);
1036 MVT::v2i32, RsrcOps), 0);
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp170 } else if (LocVT == MVT::v8i8 || LocVT == MVT::v4i16 || LocVT == MVT::v2i32) {
251 } else if (LocVT == MVT::v8i8 || LocVT == MVT::v4i16 || LocVT == MVT::v2i32) {
1009 SDValue LX = DAG.getNode(ExtOpc, dl, MVT::v2i32, LHS);
1010 SDValue RX = DAG.getNode(ExtOpc, dl, MVT::v2i32, RHS);
1050 SDValue X1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v2i32, Op1);
1051 SDValue X2 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v2i32, Op2);
1052 SDValue SL = DAG.getNode(ISD::VSELECT, DL, MVT::v2i32, PredOp, X1, X2);
1277 addRegisterClass(MVT::v2i32, &Hexagon::DoubleRegsRegClass);
1286 promoteLdStType(MVT::v2i32, MVT::i64);
1983 } else if (VT.getSimpleVT() == MVT::v2i32) {
[all...]
/external/llvm/utils/TableGen/
H A DCodeGenTarget.cpp93 case MVT::v2i32: return "MVT::v2i32";
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp67 case MVT::v2i32:
1878 case MVT::v2i32:
4236 case MVT::v2i32:
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp766 for (MVT MMXTy : {MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64}) {
873 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Custom);
925 // sequence to convert from v2i32 to v2f32.
935 setOperationAction(ISD::BITCAST, MVT::v2i32, Custom);
961 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Custom);
970 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i64, MVT::v2i32, Legal);
977 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i64, MVT::v2i32, Legal);
4834 //TODO: The code below fires only for for loading the low v2i32 / v2f32
16882 if (SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8) {
16893 // Widen the vector in input in the case of MVT::v2i32
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp616 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Legal);
7248 // For v2i64 (VSX), we can pattern patch the v2i32 case (using fp <-> int
7249 // instructions), but for smaller types, we need to first extend up to v2i32
7253 if (ExtVT != MVT::v2i32) {
7260 DAG.getValueType(MVT::v2i32));
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp4881 EVT ShAmtVT = MVT::v2i32;
4913 // We must do this early because v2i32 is not a legal type.

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