| badd826664896d4a9628a5a89b78016894aa414b |
|
02-Feb-2016 |
David Brazdil <dbrazdil@google.com> |
ART: Run SsaBuilder from HGraphBuilder
First step towards merging the two passes, which will later result in
HGraphBuilder directly producing SSA form. This CL mostly just updates
tests broken by not being able to inspect the pre-SSA form.
Using HLocals outside the HGraphBuilder is now deprecated.
Bug: 27150508
Change-Id: I00fb6050580f409dcc5aa5b5aa3a536d6e8d759e
|
| 15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc |
|
05-Jan-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement irreducible loop support in optimizing.
So we don't fallback to the interpreter in the presence of
irreducible loops.
Implications:
- A loop pre-header does not necessarily dominate a loop header.
- Non-constant redundant phis will be kept in loop headers, to
satisfy our linear scan register allocation algorithm.
- while-graph optimizations, such as gvn, licm, lse, and dce
need to know when they are dealing with irreducible loops.
Change-Id: I2cea8934ce0b40162d215353497c7f77d6c9137e
|
| 4833f5a1990c76bc2be89504225fb13cca22bedf |
|
16-Dec-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Refactor SsaBuilder for more precise typing info
This reverts commit 68289a531484d26214e09f1eadd9833531a3bc3c.
Now uses Primitive::Is64BitType instead of Primitive::ComponentSize
because it was incorrectly optimized by GCC.
Bug: 26208284
Bug: 24252151
Bug: 24252100
Bug: 22538329
Bug: 25786318
Change-Id: Ib39f3da2b92bc5be5d76f4240a77567d82c6bebe
|
| 9865bde5d822f56c4732214c2005dfcaa41f94cf |
|
21-Dec-2015 |
Mathieu Chartier <mathieuc@google.com> |
Rename NullHandle to ScopedNullHandle
This makes it clearer that is invalid to do things like:
Handle<T> h = ScopedNullHandle<T>();
Bug: 26233305
Change-Id: I6d8f54eae01ec2e901cb7043afa853ea77db79fe
|
| 68289a531484d26214e09f1eadd9833531a3bc3c |
|
16-Dec-2015 |
Alex Light <allight@google.com> |
Revert "ART: Refactor SsaBuilder for more precise typing info"
This reverts commit d9510dfc32349eeb4f2145c801f7ba1d5bccfb12.
Bug: 26208284
Bug: 24252151
Bug: 24252100
Bug: 22538329
Bug: 25786318
Change-Id: I5f491becdf076ff51d437d490405ec4e1586c010
|
| d9510dfc32349eeb4f2145c801f7ba1d5bccfb12 |
|
05-Nov-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Refactor SsaBuilder for more precise typing info
This patch refactors the SsaBuilder to do the following:
1) All phis are constructed live and marked dead if not used or proved
to be conflicting.
2) Primitive type propagation, now not a separate pass, identifies
conflicting types and marks corresponding phis dead.
3) When compiling --debuggable, DeadPhiHandling used to revive phis
which had only environmental uses but did not attempt to resolve
conflicts. This pass was removed as obsolete and is now superseded
by primitive type propagation (identifying conflicting phis) and
SsaDeadPhiEliminiation (keeping phis live if debuggable + env use).
4) Resolving conflicts requires correct primitive type information
on all instructions. This was not the case for ArrayGet instructions
which can have ambiguous types in the bytecode. To this end,
SsaBuilder now runs reference type propagation and types ArrayGets
from the type of the input array.
5) With RTP being run inside the SsaBuilder, it is not necessary to
run it as a separate optimization pass. Optimizations can now assume
that all instructions of type kPrimNot have reference type info after
SsaBuilder (with the exception of NullConstant).
6) Graph now contains a reference type to be assigned to NullConstant.
All reference type instructions therefore have RTI, as now enforced
by the SsaChecker.
Bug: 24252151
Bug: 24252100
Bug: 22538329
Bug: 25786318
Change-Id: I7a3aee1ff66c82d64b4846611c547af17e91d260
|
| 8df69d42a9e3ccd9456ff72fac8dbd1999f98755 |
|
23-Oct-2015 |
Mingyao Yang <mingyao@google.com> |
Revert "Revert "load store elimination.""
This reverts commit 8030c4100d2586fac39ed4007c61ee91d4ea4f25.
Change-Id: I79558d85484be5f5d04e4a44bea7201fece440f0
|
| 8030c4100d2586fac39ed4007c61ee91d4ea4f25 |
|
15-Oct-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "load store elimination."
Breaks libcore tests:
libcore.java.lang.ref.FinalizeTest#testWatchdogDoesNotFailForObjectsThatAreNearTheDeadline
libcore.java.util.ResourceLeakageDetectorTest#testDetectsUnclosedCloseGuard
org.apache.harmony.tests.java.lang.ref.ReferenceTest#test_finalizeReferenceInteraction
This reverts commit 589dac7f0ce078d19aad7e35bb0195c47ddf01d2.
Change-Id: I55115765c10762d5bc152d3425e4622560d8b9f4
|
| 589dac7f0ce078d19aad7e35bb0195c47ddf01d2 |
|
24-Aug-2015 |
Mingyao Yang <mingyao@google.com> |
load store elimination.
This adds a pass to eliminate some unnecessary heap loads/stores. It
first collects heap locations and then tracks values stored to those heap
locations. Alias analysis is done based on offset, type, singleton,
pre-existence, etc.
Change-Id: I11a9d8ef20d1b2f245607eb25118e9aff9be472a
|
| e6e3beaf2d35d18a79f5e7b60a21e75fac9fd15d |
|
14-Oct-2015 |
Calin Juravle <calin@google.com> |
Revert "Revert "optimizing: propagate type information of arguments""
This reverts commit 89c0d32437011bbe492fe14c766cd707046ce043.
Change-Id: I603a49794e155cc97410b8836c8ea425bfdc98eb
|
| c05aca78fad20901ae17902a3671ccfca9071758 |
|
13-Oct-2015 |
Calin Juravle <calin@google.com> |
Revert "optimizing: propagate type information of arguments"
This reverts commit 2c1ffc3a06e9ed0411e29e7dc2558b5d657ede7a.
Change-Id: I3291070c373e661fa578f5a38becbb5a502baf94
|
| 2c1ffc3a06e9ed0411e29e7dc2558b5d657ede7a |
|
12-Oct-2015 |
Calin Juravle <calin@google.com> |
optimizing: propagate type information of arguments
This helps inlining and type check elimination.
e.g:
void foo(ArrayList a) {
int size = a.size(); // this can be inlined now.
}
Change-Id: I3ffeaa79d9df444aa19511c83c544cb5f9d9ab20
|
| ec7802a102d49ab5c17495118d4fe0bcc7287beb |
|
01-Oct-2015 |
Vladimir Marko <vmarko@google.com> |
Add DCHECKs to ArenaVector and ScopedArenaVector.
Implement dchecked_vector<> template that DCHECK()s element
access and insert()/emplace()/erase() positions. Change the
ArenaVector<> and ScopedArenaVector<> aliases to use the new
template instead of std::vector<>. Remove DCHECK()s that
have now become unnecessary from the Optimizing compiler.
Change-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc
|
| 154746b84b407cfd166b45e039b62e6a06dc3f39 |
|
06-Oct-2015 |
Calin Juravle <calin@google.com> |
Remove dex_pc's default value from top level HInstruction
This clearly hints that the dex_pc is stored in the super class and
doesn't need to be reimplemented in subclasses.
Change-Id: Ifd4aa95190c4c89367b4dd2cc8ab0ffd263659ac
|
| 2aaa4b5532d30c4e65d8892b556400bb61f9dc8c |
|
17-Sep-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing: Tag more arena allocations.
Replace GrowableArray with ArenaVector and tag arena
allocations with new allocation types.
As part of this, make the register allocator a bit more
efficient, doing bulk insert/erase. Some loops are now
O(n) instead of O(n^2).
Change-Id: Ifac0871ffb34b121cc0447801a2d07eefd308c14
|
| fa6b93c4b69e6d7ddfa2a4ed0aff01b0608c5a3a |
|
15-Sep-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing: Tag arena allocations in HGraph.
Replace GrowableArray with ArenaVector in HGraph and related
classes HEnvironment, HLoopInformation, HInvoke and HPhi,
and tag allocations with new arena allocation types.
Change-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d
|
| 736b560f2d2c89b63dc895888c671b5519afa4c8 |
|
02-Sep-2015 |
Mathieu Chartier <mathieuc@google.com> |
Reduce how often we call FindDexCache
Before host boot.oat -j4 optimizing compile:
real 1m17.792s
user 3m26.140s
sys 0m8.340s
After:
real 1m12.324s
user 3m22.718s
sys 0m8.320s
Change-Id: If18e9e79e06cdf1676692e5efacb682bf93889c3
|
| 30971d6e2e13c0f2f70fd6d36cf7cba62eddbf04 |
|
01-Jun-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix lint error.
Change-Id: Ibba7622a0c66eba653147f2e861606fffc7f685e
|
| 23a8188a8deb715d4b9f88b7644474182ae5bedd |
|
01-Jun-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix gtest by adding fake lifetime positions.
Change-Id: I7cd89143103ac3e372406dff5d3837c9d91bb00d
|
| 104fd8a3f30ddcf07831250571aa2a233cd5c04d |
|
20-May-2015 |
Guillaume "Vermeille" Sanchez <guillaumesa@google.com> |
Bring Reference Type Propagation to Instance/StaticInstanceField
For this, we need the field index in FieldInfo, hence the add of the field.
Change-Id: Id219bd826d8496acf3981307a8c42e2eb6ddb712
|
| 0a23d74dc2751440822960eab218be4cb8843647 |
|
07-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Add a parent environment to HEnvironment.
This code has no functionality change. It adds a placeholder
for chaining inlined frames.
Change-Id: I5ec57335af76ee406052345b947aad98a6a4423a
|
| 2af2307f3903a75a379029c049b86f9903fc81a5 |
|
30-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "GVN final fields even with side effects."
This reverts commit 781733632637db98d79dfffad72bf063be3259be.
Change-Id: Id7c4591f6b8190921852044b278d11627457c570
|
| 781733632637db98d79dfffad72bf063be3259be |
|
29-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
GVN final fields even with side effects.
Two accesses of a final field can be GVN'ed even if there are
side effects between them.
Change-Id: I04495ae83c7858f4216b083ad1c29851954320ad
|
| 8cbab3c4de3328b576454ce702d7748f56c44346 |
|
23-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Linear scan: split at better positions.
- Split at block entry to piggy back on control flow resolution.
- Split at the loop header, if the split position is within a loop.
Change-Id: I718299a58c02ee02a1b22bda589607c69a35f0e8
|
| f4eb9ae9436d72d1406286528331a52c1b3afa1d |
|
17-Apr-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Fix a failing gtest
Stricter assumptions about the state of linear scan caused a reg alloc
gtest to fail.
Change-Id: I0c568bf996ce6adefe4f000524b38acd3967421e
|
| 0d9f17de8f21a10702de1510b73e89d07b3b9bbf |
|
15-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Move the linear order to the HGraph.
Bug found by Zheng Xu: SsaLivenessAnalysis being a stack allocated
object, we should not refer to it in later phases of the compiler.
Specifically, the code generator was using the linear order, which
was stored in the liveness analysis object.
Change-Id: I574641f522b7b86fc43f3914166108efc72edb3b
|
| fb8d279bc011b31d0765dc7ca59afea324fd0d0c |
|
01-Apr-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing] Implement x86/x86_64 math intrinsics
Implement floor/ceil/round/RoundFloat on x86 and x86_64.
Implement RoundDouble on x86_64.
Add support for roundss and roundsd on both architectures. Support them
in the disassembler as well.
Add the instruction set features for x86, as the 'round' instruction is
only supported if SSE4.1 is supported.
Fix the tests to handle the addition of passing the instruction set
features to x86 and x86_64.
Add assembler tests for roundsd and roundss to x86_64 assembler tests.
Change-Id: I9742d5930befb0bbc23f3d6c83ce0183ed9fe04f
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 8d5b8b295930aaa43255c4f0b74ece3ee8b43a47 |
|
24-Mar-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Force constants into the entry block
Optimizations such as GVN and BCE make the assumption that all
constants are located in the entry block of the CFG, but not all
passes adhere to this rule.
This patch makes constructors of constants private and only accessible
to friend classes - HGraph for int/long constants and SsaBuilder for
float/double - which ensure that they are placed correctly and not
duplicated.
Note that the ArenaAllocatorAdapter was modified to not increment
the ArenaAllocator's internal reference counter in order to allow
for use of ArenaSafeMap inside an arena-allocated objects. Because
their destructor is not called, the counter does not get decremented.
Change-Id: I36a4fa29ae34fb905cdefd482ccbf386cff14166
|
| 10f56cb6b4e39ed0032e9a23b179b557463e65ad |
|
24-Mar-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Fix crash in gtests
SsaLivenessAnalysis was crashing after change of iteration order in
142377 because gtests do not always build reverse post order.
Change-Id: If5ad5b7c52040b119c4415f0b942988049fa3c16
|
| 09b8463493aeb6ea2bce05f67d3457d5fcc8a7d9 |
|
13-Feb-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing compiler] x86 goodness
Implement the x86 version of
https://android-review.googlesource.com/#/c/129560/, which made some
enhancements to x86_64 code.
- Use leal to implement 3 operand adds
- Use testl rather than cmpl to 0 for registers
- Use leaq for x86_64 for adds with constant in int32_t range
Note:
- The range and register allocator tests seem quite fragile. I had to
change ADD_INT_LIT8 to XOR_INT_LIT8 for the register allocator test to
get the code to run. It seems like this is a bit hard-coded to
expected code generation sequences. I also changes BuildTwoAdds to
BuildTwoSubs for the same reason.
- For the live range test, I just changed the expected output, as the
Locations were different.
Change-Id: I402f2e95ddc8be4eb0befb3dae1b29feadfa29ab
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| b666f4805c8ae707ea6fd7f6c7f375e0b000dba8 |
|
18-Feb-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move arenas into runtime
Moved arena pool into the runtime.
Motivation:
Allow GC to use arena allocators, recycle arena pool for linear alloc.
Bug: 19264997
Change-Id: I8ddbb6d55ee923a980b28fb656c758c5d7697c2f
|
| 5e8b137d28c840b128e2488f954cccee3e86db14 |
|
23-Jan-2015 |
David Brazdil <dbrazdil@google.com> |
Create HGraph outside Builder, print timings
This patch refactors the way HGraph objects are created, moving the
instantiation out of the Builder class and creating the CodeGenerator
earlier. The patch uses this to build a single interface for printing
timings info and dumping the CFG.
Change-Id: I2eb63eabf28e2d0f5cdc7affaa690c3a4b1bdd21
|
| 18c219b21c6692036bc5f1d52f26c66378325bee |
|
04-Feb-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix test after register allocator changes.
Change-Id: I22b8faf7926d33ab19033deaba77001d164abd2a
|
| d426a8f36d958a251d14e263c9c9e928848df90f |
|
20-Jan-2015 |
Calin Juravle <calin@google.com> |
Fix register allocator test.
Change-Id: I87481757d6f59bf2d6127571f58f11b5372b3a06
|
| cd6dffedf1bd8e6dfb3fb0c933551f9a90f7de3f |
|
08-Jan-2015 |
Calin Juravle <calin@google.com> |
Add implicit null checks for the optimizing compiler
- for backends: arm, arm64, x86, x86_64
- fixed parameter passing for CodeGenerator
- 003-omnibus-opcodes test verifies that NullPointerExceptions work as
expected
Change-Id: I1b302acd353342504716c9169a80706cf3aba2c8
|
| dd8f887e81b894bc8075d8bacdb223747b6a8018 |
|
15-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in the register allocator.
When allocating a register blocked by existing intervals,
we need to split inactive intervals at the end of their
lifetime hole, and not at the next intersection. Otherwise,
the allocation for following intervals will not see
that a register is being used by the split interval.
Change-Id: I40cc79dde541c07392a7cf4c6f0b291dd1ce1819
|
| 52c489645b6e9ae33623f1ec24143cde5444906e |
|
16-Dec-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add support for volatile
- for backends: arm, x86, x86_64
- added necessary instructions to assemblies
- clean up code gen for field set/get
- fixed InstructionDataEquals for some instructions
- fixed comments in compiler_enums
* 003-opcode test verifies basic volatile functionality
Change-Id: I144393efa312dfb2c332cb84056b00edffee338a
|
| e53798a7e3267305f696bf658e418c92e63e0834 |
|
01-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Inlining support in optimizing.
Currently only inlines simple things that don't require an
environment, such as:
- Returning a constant.
- Returning a parameter.
- Returning an arithmetic operation.
Change-Id: Ie844950cb44f69e104774a3cf7a8dea66bc85661
|
| f537012ceb6cba8a78b36a5065beb9588451a250 |
|
02-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Treat SSA transformation special, as we may have to bailout.
We forgot to bailout when we found a non-natural loop (on which
our optimizations don't work).
Change-Id: I11976b5af4c98f4f29267a74c74d34b5ad81e20c
|
| d6fb6cfb6f2d0d9595f55e8cc18d2753be5d9a13 |
|
11-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add DIV_LONG
- for backends: arm, x86, x86_64
- added cqo, idivq, testq assembly for x64_64
- small cleanups
Change-Id: I762ef37880749038ed25d6014370be9a61795200
|
| f43083d560565aea46c602adb86423daeefe589d |
|
07-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Do not update Out after it has a valid location.
Slow paths use LocationSummary to know where to move
things around, and they are executed at the end of the
code generation.
This fix is needed for https://android-review.googlesource.com/#/c/113345/.
Change-Id: Id336c6409479b1de6dc839b736a7234d08a7774a
|
| d0d4852847432368b090c184d6639e573538dccf |
|
04-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add div-int and exception handling.
- for backends: arm, x86, x86_64
- fixed a register allocator bug: the request for a fixed register for
the first input was ignored if the output was kSameAsFirstInput
- added divide by zero exception
- more tests
- shuffle around some code in the builder to reduce the number of lines
of code for a single function.
Change-Id: Id3a515e02bfbc66cd9d16cb9746f7551bdab3d42
|
| 296bd60423e0630d8152b99fb7afb20fbff5a18a |
|
07-Oct-2014 |
Mingyao Yang <mingyao@google.com> |
Some improvement to reg alloc.
Change-Id: If579a37791278500a7e5bc763f144c241f261920
|
| 1f897b98e19a9b0192a373ee9d3c2fcb4a9463f4 |
|
21-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix register_allocator_test after reg alloc changes.
Change-Id: Ieaf5daf35efaff6685720a93a442cd7a152f1567
|
| 56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f |
|
09-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Stop converting from Location to ManagedRegister.
Now the source of truth is the Location object that knows
which register (core, pair, fpu) it needs to refer to.
Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
|
| 01ef345767ea609417fc511e42007705c9667546 |
|
01-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add trivial register hints to the register allocator.
- Add hints for phis, same as first input, and expected registers.
- Make the if instruction accept non-condition instructions.
Change-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5
|
| fd680d8c8b3ab7cf162bae2d322f6327d05ef23f |
|
29-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix test now that instructions can die at instruction entry.
Change-Id: I816279c55d12de8e69ac0b6c88730bd676c03335
|
| aac0f39a3501a7f7dd04b2342c2a16961969f139 |
|
16-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in the register allocator.
We need to take the live interval that starts first to know
until when a register is free, instead of using the live interval
that is last in the inactive list.
Change-Id: I2c9f87481ff1b4fc7b9948db7559b8d3b11d84ce
|
| 8a16d97fb8f031822b206e65f9109a071da40563 |
|
11-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix valgrind errors.
For now just stack allocate the code generator. Will think
about cleaning up the root problem later (CodeGenerator being an
arena object).
Change-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7
|
| 3946844c34ad965515f677084b07d663d70ad1b8 |
|
02-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Runtime support for the new stack maps for the opt compiler.
Now most of the methods supported by the compiler can be optimized,
instead of using the baseline.
Change-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa
|
| 3ac17fcce8773388512ce72cb491b202872ca1c1 |
|
07-Aug-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix SsaDeadPhiElimination in the presence of dependent phis.
This fixes the problem of having a dead loop phi taking as back-edge
input a phi that also has this loop phi as input. Walking backwards
does not solve the problem because the loop phi will be visited last.
Most of the time, dex removes dead locals like this.
Change-Id: I797198cf9c15f8faa6585cca157810e23aaa4940
|
| de025a7d90603d58c62b8fd91393f13d8826a7ac |
|
19-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in LiveInterval::FirstRegisterUseAfter.
Since the use list is shared amongst siblings, we must stop looking
for the user once we have reached the end position of the current
interval. The next uses are for the next sibling.
Change-Id: Ibba180161e94a705e2034abd0b95a29347950257
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| 86dbb9a12119273039ce272b41c809fa548b37b6 |
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04-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Final CL to enable register allocation on x86.
This CL implements:
1) Resolution after allocation: connecting the locations
allocated to an interval within a block and between blocks.
2) Handling of fixed registers: some instructions require
inputs/output to be at a specific location, and the allocator
needs to deal with them in a special way.
3) ParallelMoveResolver::EmitNativeCode for x86.
Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
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| 31d76b42ef5165351499da3f8ee0ac147428c5ed |
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09-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Plug code generator into liveness analysis.
Also implement spill slot support.
Change-Id: If5e28811e9fbbf3842a258772c633318a2f4fafc
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| ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
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03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE
Merge ART from AOSP to lmp-preview-dev.
Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
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| a7062e05e6048c7f817d784a5b94e3122e25b1ec |
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22-May-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add a linear scan register allocator to the optimizing compiler.
This is a "by-the-book" implementation. It currently only deals
with allocating registers, with no hint optimizations.
The changes remaining to make it functional are:
- Allocate spill slots.
- Resolution and placements of Move instructions.
- Connect it to the code generator.
Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
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