cddc3e03e4ec99c0268c03a126195173e519ed58 |
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04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229 http://b/26987366 (cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383) Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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6948897e478cbd66626159776a8017b3c18579b9 |
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01-Jul-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r239765 Bug: 20140355: This rebase pulls the upstream fix for the spurious warnings mentioned in the bug. Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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0c7f116bb6950ef819323d855415b2f2b0aad987 |
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06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153 Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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4c5e43da7792f75567b693105cc53e3f1992ad98 |
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08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350 Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699. Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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37ed9c199ca639565f6ce88105f9e39e898d82d0 |
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01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494. Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c0b12dfd0a83081c1ebbb55a89c7a2c1f98f1842 |
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12-Sep-2013 |
Hal Finkel <hfinkel@anl.gov> |
Mark PPC MFTB and DST (and friends) as deprecated Use the new instruction deprecation feature to mark mftb (now replaced with mfspr) and dst (along with the other Altivec cache control instructions) as deprecated when targeting cores supporting at least ISA v2.03. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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411dea0e7206ccc8018261831225d898d069ff1d |
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12-Sep-2013 |
Hal Finkel <hfinkel@anl.gov> |
PPC: Enable aggressive anti-dependency breaking Aggressive anti-dependency breaking is enabled by default for all PPC cores. This provides a general speedup on the P7 and other platforms (among other factors, the instruction group formation for the non-embedded PPC cores is done during post-RA scheduling). In order to do this safely, the incompatibility between uses of the MFOCRF instruction and anti-dependency breaking are resolved by marking MFOCRF with hasExtraSrcRegAllocReq. As noted in the removed FIXME, the problem was that MFOCRF's output is sensitive to the identify of the source register, and always paired with a shift to undo this effect. Because anti-dependency breaking is unaware of this hidden dependency of the shift amount on the source register of the MFOCRF instruction, changing that register must be inhibited. Two test cases were adjusted: The SjLj test was made more insensitive to register choices and scheduling; the saveCR test disabled anti-dependency breaking because part of what it is testing is proper register reuse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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b7fbc5baad87eb5cc143193e66139824993883d3 |
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12-Sep-2013 |
Hal Finkel <hfinkel@anl.gov> |
Enable MI scheduling (and CodeGen AA) by default for embedded PPC cores For embedded PPC cores (especially the A2 core), using the MI scheduler with AA is far superior to the other scheduling options. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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953a78084b85ea88cd2b208153a72df70e27133f |
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19-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add the PPC fcpsgn instruction Modern PPC cores support a floating-point copysign instruction, and we can use this to lower the FCOPYSIGN node (which is created from calls to the libm copysign function). A couple of extra patterns are necessary because the operand types of FCOPYSIGN need not agree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188653 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f38cc38fa647d4e72c053c39bbe0cdec1342535f |
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26-Jul-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
[PowerPC] Support powerpc64le as a syntax-checking target. This patch provides basic support for powerpc64le as an LLVM target. However, use of this target will not actually generate little-endian code. Instead, use of the target will cause the correct little-endian built-in defines to be generated, so that code that tests for __LITTLE_ENDIAN__, for example, will be correctly parsed for syntax-only testing. Code generation will otherwise be the same as powerpc64 (big-endian), for now. The patch leaves open the possibility of creating a little-endian PowerPC64 back end, but there is no immediate intent to create such a thing. The LLVM portions of this patch simply add ppc64le coverage everywhere that ppc64 coverage currently exists. There is nothing of any import worth testing until such time as little-endian code generation is implemented. In the corresponding Clang patch, there is a new test case variant to ensure that correct built-in defines for little-endian code are generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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a44c37f880c8ca84b7388dd52fb2708495697a18 |
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16-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
PPC: Refactoring to support subtarget feature changing This change mirrors the changes that were made to the X86 and ARM targets to support subtarget feature changing. As indicated in r182899, the mechanism is still undergoing revision, and so as with the X86 and ARM targets, there is no test case yet (there is no effective functionality change). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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827307b95fa909e35a3ddef612f9f50ffcf0963a |
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03-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Use PPC reciprocal estimates with Newton iteration in fast-math mode When unsafe FP math operations are enabled, we can use the fre[s] and frsqrte[s] instructions, which generate reciprocal (sqrt) estimates, together with some Newton iteration, in order to quickly generate floating-point division and sqrt results. All of these instructions are separately optional, and so each has its own feature flag (except for the Altivec instructions, which are covered under the existing Altivec flag). Doing this is not only faster than using the IEEE-compliant fdiv/fsqrt instructions, but allows these computations to be pipelined with other computations in order to hide their overall latency. I've also added a couple of missing fnmsub patterns which turned out to be missing (but are necessary for good code generation of the Newton iterations). Altivec needs a similar fix, but that will probably be more complicated because fneg is expanded for Altivec's v4f32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178617 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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46479197843ecb651adc9417c49bbd1b00acfcb6 |
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01-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add more PPC floating-point conversion instructions The P7 and A2 have additional floating-point conversion instructions which allow a direct two-instruction sequence (plus load/store) to convert from all combinations (signed/unsigned i32/i64) <--> (float/double) (on previous cores, only some combinations were directly available). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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8049ab15e4b638a07d6f230329945c2310eca27b |
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31-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add the PPC lfiwax instruction This instruction is available on modern PPC64 CPUs, and is now used to improve the SINT_TO_FP lowering (by eliminating the need for the separate sign extension instruction and decreasing the amount of needed stack space). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f5d5c434606161fb017a34cb656fa4aa5a3e076b |
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29-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add PPC FP rounding instructions fri[mnpz] These instructions are available on the P5x (and later) and on the A2. They implement the standard floating-point rounding operations (floor, trunc, etc.). One caveat: frin (round to nearest) does not implement "ties to even", and so is only enabled in fast-math mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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efdd4673d6e78f3d406c5d1f44316aef8a5a9a48 |
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28-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add the PPC64 ldbrx/stdbrx instructions These are 64-bit load/store with byte-swap, and available on the P7 and the A2. Like the similar instructions for 16- and 32-bit words, these are matched in the target DAG-combine phase against load/store-bswap pairs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c53ab4d77f4b3d2905cf9ad625c28ff6b1c04aff |
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28-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add the PPC64 popcntd instruction PPC ISA 2.06 (P7, A2, etc.) has a popcntd instruction. Add this instruction and tell TTI about it so that popcount-loop recognition will know about it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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9a79b320cb7f179118e69427bc684f2232a24bd9 |
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31-Jan-2013 |
Hal Finkel <hfinkel@anl.gov> |
PPC QPX requires a 32-byte aligned stack On systems which support the QPX vector instructions, the stack must be 32-byte aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f9cd7738a3966986dd50db56d8a74952b3016cc0 |
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30-Jan-2013 |
Hal Finkel <hfinkel@anl.gov> |
Initialize hasQPX in PPCSubtarget This should have gone in with r173973. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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0b8c9a80f20772c3793201ab5b251d3520b9cea3 |
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02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move all of the header files which are involved in modelling the LLVM IR into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
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03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib. Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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aa71428378c1cb491ca60041d8ba7aa110bc963d |
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25-Oct-2012 |
Adhemerval Zanella <azanella@linux.vnet.ibm.com> |
Initial TOC support for PowerPC64 object creation This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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e37091931cc409d3189a69eb581871c6e743832d |
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04-Oct-2012 |
Will Schmidt <will_schmidt@vnet.ibm.com> |
test commit / whitespace git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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009f7afbeb77d1cc8e962bac7057b73b6d39d62f |
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23-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add support for the PPC isel instruction. The isel (integer select) instruction is supported on the 440 and A2 embedded cores and on the POWER7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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4db738ae9862a2d00e2dca5b8fbf9d4dfa706142 |
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12-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Reapply r158337, this time properly protect Darwin/PPC host CPU use with __ppc__. Original commit message: Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName(). Both the new Linux functionality and the old Darwin functions have been moved. This change also allows this information to be queried directly by clang and other frontends (clang, for example, will now have real -mcpu=native support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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138c2b4e8a4480f4d956980b24c504c27e18cfc1 |
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12-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert r158337 "Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName()." This commit broke most of the PowerPC unit tests when running on Intel/Apple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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7bb39d861297398e62e2aed6dda3e80d82c453cd |
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12-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Move PPC host-CPU detection logic from PPCSubtarget into sys::getHostCPUName(). Both the new Linux functionality and the old Darwin functions have been moved. This change also allows this information to be queried directly by clang and other frontends (clang, for example, will now have real -mcpu=native support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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bd5cafd9bbba2180e7179436fb29071201d5ea9f |
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11-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Rename the PPC target feature gpul to mfocrf. The PPC target feature gpul (IsGigaProcessor) was only used for one thing: To enable the generation of the MFOCRF instruction. Furthermore, this instruction is available on other PPC cores outside of the G5 line. This feature now corresponds to the HasMFOCRF flag. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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9770be91de745e4727c65c45d13de2a787aef89f |
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11-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add A2 to the list of PPC CPUs recognized by Linux host CPU-type detection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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2bd0acd2506c664573d2f0d7671932101c46899e |
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11-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add local CPU detection for Linux PPC. This functionality mirrors that available on PPC/Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158314 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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01a90f4f8fc7187883377f69e2725ab5e23cc393 |
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10-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Use critical anti-dep. breaking on all PPC targets, but also add other register classes. Using 'all' instead of 'critical' would be better because it would make it easier to satisfy the bundling constraints, but, as noted in the FIXME, that is currently not possible with the crs. This yields an average 1% speedup over the entire test suite (on Power 7). Largest speedups: SingleSource/Benchmarks/Shootout-C++/moments - 40% MultiSource/Benchmarks/McCat/03-testtrie/testtrie - 28% SingleSource/Benchmarks/BenchmarkGame/nsieve-bits - 26% SingleSource/Benchmarks/McGill/misr - 23% MultiSource/Applications/JM/ldecod/ldecod - 22% Largest slowdowns: SingleSource/Benchmarks/Shootout-C++/matrix - -29% SingleSource/Benchmarks/Shootout-C++/ary3 - -22% MultiSource/Benchmarks/BitBench/uuencode/uuencode - -18% SingleSource/Benchmarks/Shootout-C++/ary - -17% MultiSource/Benchmarks/MiBench/automotive-bitcount/automotive-bitcount - -15% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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97c9d4c64c870c1eceb1d6264f2457273e6e0738 |
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01-Apr-2012 |
Hal Finkel <hfinkel@anl.gov> |
Use full anti-dep. breaking with post-ra sched. on the embedded ppc cores. Post-RA scheduling gives a significant performance improvement on the embedded cores, so turn it on. Using full anti-dep. breaking is important for FP-intensive blocks, so turn it on (just on the embedded cores for now; this should also be good on the 970s because post-ra scheduling is all that we have for now, but that should have more testing first). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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4d989ac93ce608057fb6b13a4068264ab037ecd5 |
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01-Apr-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add instruction itinerary for the PPC64 A2 core. This adds a full itinerary for IBM's PPC64 A2 embedded core. These cores form the basis for the CPUs in the new IBM BG/Q supercomputer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153842 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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64c34e253563a8ba6b41fbce2bb020632cf65961 |
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02-Dec-2011 |
Hal Finkel <hfinkel@anl.gov> |
update PPC 940 hazard rec. to function in postRA mode git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145676 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2 |
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17-Oct-2011 |
Hal Finkel <hfinkel@anl.gov> |
Add PPC 440 scheduler and some associated tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
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24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong. These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c60f9b752381baa6c4b80c0739034660f1748c84 |
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14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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59ee62d2418df8db499eca1ae17f5900dc2dcbba |
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11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ffc0e73046f737d75e0a62b3a83ef19bcef111e3 |
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09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Change createAsmParser to take a MCSubtargetInfo instead of triple, CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ebdeeab812beec0385b445f3d4c41a114e0d972f |
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08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate asm parser's dependency on TargetMachine: - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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0ddff1b5359433faf2eb1c4ff5320ddcbd42f52f |
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07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Compute feature bits at time of MCSubtargetInfo initialization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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385e930d55f3ecd3c9538823dfa5896a12461845 |
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02-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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5b1b4489cf3a0f56f8be0673fc5cc380a32d277b |
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01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetSubtarget to TargetSubtargetInfo for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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94214703d97d8d9dfca88174ffc7e94820a85e62 |
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01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Added MCSubtargetInfo to capture subtarget features and scheduling itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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276365dd4bc0c2160f91fd8062ae1fc90c86c324 |
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30-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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18a0929a7a0b87cc50565250e33c33925a57d498 |
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19-Apr-2011 |
Daniel Dunbar <daniel@zuster.org> |
Target/PPC: Kill off DarwinVers, which is now dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129811 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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869eca129b2560a59b8aa0e8fd57b5d8f7de1f96 |
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19-Apr-2011 |
Daniel Dunbar <daniel@zuster.org> |
Target/PPC: Add a TargetTriple field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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1e61e69d401045c54b15815f15a0fdb3ca56a9b5 |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
add targetoperand flags for jump tables, constant pool and block address nodes to indicate when ha16/lo16 modifiers should be used. This lets us pass PowerPC/indirectbr.ll. The one annoying thing about this patch is that the MCSymbolExpr isn't expressive enough to represent ha16(label1-label2) which we need on PowerPC. I have a terrible hack in the meantime, but this will have to be revisited at some point. Last major conversion item left is global variable references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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0e3a1a8f8fbe34d47c83d19c8b11a3bfdcacad00 |
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04-Aug-2010 |
Torok Edwin <edwintorok@gmail.com> |
Use indirect calls in PowerPC JIT. See PR5201. There is no way to know if direct calls will be within the allowed range for BL. Hence emit all calls as indirect when in JIT mode. Without this long-running applications will fail to JIT on PowerPC with a relocation failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f0356fe140af1a30587b9a86bcfb1b2c51b8ce20 |
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27-Jan-2010 |
Jeffrey Yasskin <jyasskin@google.com> |
Kill ModuleProvider and ghost linkage by inverting the relationship between Modules and ModuleProviders. Because the "ModuleProvider" simply materializes GlobalValues now, and doesn't provide modules, it's renamed to "GVMaterializer". Code that used to need a ModuleProvider to materialize Functions can now materialize the Functions directly. Functions no longer use a magic linkage to record that they're materializable; they simply ask the GVMaterializer. Because the C ABI must never change, we can't remove LLVMModuleProviderRef or the functions that refer to it. Instead, because Module now exposes the same functionality ModuleProvider used to, we store a Module* in any LLVMModuleProviderRef and translate in the wrapper methods. The bindings to other languages still use the ModuleProvider concept. It would probably be worth some time to update them to follow the C++ more closely, but I don't intend to do it. Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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74da671c36cdaa6bea3fa7889dc9aeab572b609c |
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12-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate asmflavor from subtarget, PPCTAI is the only client and each callee knows that it returns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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e22f4da01d57f51757663fdcae986af0aeca49fe |
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05-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove some dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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3be03406c9c3b2075d5ae416499af2f15f703d6f |
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03-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Normalize Subtarget constructors to take a target triple string instead of Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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d68a07650cdb2e18f18f362ba533459aa10e01b6 |
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05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ae94e594164b193236002516970aeec4c4574768 |
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05-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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a8103dad4e84e031c5845e18268655cc0bfbdb8d |
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04-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r60519. It was causing a bootstrap failure: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT barrier.lo -MD -MP -MF .deps/barrier.Tpo -c ../../../llvm-gcc.src/libgomp/barrier.c -fno-common -DPIC -o .libs/barrier.o checking for sys/file.h... /var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:non-relocatable subtraction expression, "_gomp_tls_key" minus "L1$pb" /var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:symbol: "_gomp_tls_key" can't be undefined in a subtraction expression make[4]: *** [barrier.lo] Error 1 make[4]: *** Waiting for unfinished jobs.... /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT alloc.lo -MD -MP -MF .deps/alloc.Tpo -c ../../../llvm-gcc.src/libgomp/alloc.c -o alloc.o >/dev/null 2>&1 yes checking for sys/param.h... make[3]: *** [all-recursive] Error 1 make[2]: *** [all] Error 2 make[1]: *** [all-target-libgomp] Error 2 make[1]: *** Waiting for unfinished jobs.... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60527 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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eb83dfde66b4614fe48a572ea2ee1d7b91bcbc19 |
|
04-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Visibility hidden GVs do not require extra load of symbol address from the GOT or non-lazy-ptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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80d7e265138b3876c82c077c48c8f2a5cd103a46 |
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23-May-2008 |
Dale Johannesen <dalej@apple.com> |
Add a missed CommonLinkage check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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3b407444c9a45feb74b70b43138580d5f0299597 |
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15-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Cosmetics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ab1a0354ecff51d27098d6f11fbeabc65dec7123 |
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15-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Remove warning about 64-bit code on processor that doesn't support it. Per Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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db01c8ba26f288636d3f574a96af3499ee6d2579 |
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15-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Rewrite tblgen handling of subtarget features so it follows the order of the enum, not alphabetical. The motivation is to make -mattr=+ssse3,+sse41 select SSE41 as it ought to. Added "ignored" enum values of 0 to PPC and SPU to avoid compiler warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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e51775dc5e3503092313fe77174127f4f4d17374 |
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08-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Use size_t to store Pos, avoid truncating value on 64-bit builds. Analysis and original patch by Török Edwin. Code audit found another place with the same problem, also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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564da5d646dfeb56df931b42fefa7c5f2591057e |
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02-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
leopard and above support alignment for common symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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4ee451de366474b9c228b4e5fa573795a715216d |
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29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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a99be51bf5cdac1438069d4b01766c47704961c8 |
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05-Jul-2007 |
Gabor Greif <ggreif@gmail.com> |
Here is the bulk of the sanitizing. Almost all occurrences of "bytecode" in the sources have been eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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5cbf985dcbc89fba3208e7baf8b6f488b06d3ec9 |
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30-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid confusion with external linkage types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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cb9009993b20ab41fab56518d666ba69533db4b3 |
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16-Jan-2007 |
Bill Wendling <isanbard@gmail.com> |
Instead of yet another enum indicating the "assembly language flavor", just use the one that's in the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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57fc62c8d2bf056b0d2a0e3d1b82b3b787b899f8 |
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12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Another step forward in PPC64 JIT support: we now no-longer need stubs emitted for external globals in PPC64-JIT-PIC mode (which is good because we didn't handle them before!). This also fixes a bug handling the picbase delta, which we would get wrong in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8 |
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07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
What should be the last unnecessary <iostream>s in the library. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ba4733d901b1c2b994f66707657342b8c81c92bc |
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15-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Remove what little AIX support we have. It has never been tested and isn't complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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8fa05dac3962202eeb6de434aeb9f720e384345b |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Force 64-bit register availability in 64-bit mode. For real. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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af89fa609bce1004c9ea9737d9fdb32f4224ef1c |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the -darwin and -aix llc options, inferring darwinism and aixism from the target triple & subtarget info. woo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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7c1fb5f08c7c1e9550b7eb2d8d32c93648a6d08e |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Document the subtarget features better, make sure that 64-bit mode, 64-bit support, and 64-bit register use are all consistent with each other. Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this to configure TargetData differently. This not makes ppc64 blow up on lots of stuff :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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a7a5854f1c3710f4bedf069be4771b81e449f2a3 |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Rename some subtarget features. A CPU now can *have* 64-bit instructions, can in 32-bit mode we can choose to optionally *use* 64-bit registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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94de9a8951339536af1cc0ca947bc1005eb8f5f3 |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
First baby step towards ppc64 support. This adds a new -march=ppc64 backend that is currently just like ppc32 :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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5126984b1da4bda0e93961da07e883699f1f2d57 |
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01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this: void foo(float a, int *b) { *b = a; } to this: _foo: fctiwz f0, f1 stfiwx f0, 0, r4 blr instead of this: _foo: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) stw r2, 0(r4) blr This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the right thing for GCC bugzilla 26505. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26447 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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4c1aa866578f7a358407a22fe55b454f52a24325 |
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22-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Added option -relocation-model to set relocation model. Valid values include static, pic, dynamic-no-pic, and default. PPC and x86 default is dynamic-no-pic for Darwin, pic for others. - Removed options -enable-pic and -ppc-static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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969097968c2f845caa6085abfc357ad53eb18956 |
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28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add a note about how we should implement this FIXME from the legalizer: // FIXME: revisit this when we have some kind of mechanism by which targets // can decided legality of vector constants, of which there may be very // many. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25733 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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1d05cb47a94bb5639b690519c6027447791e06f7 |
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17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
add an option to generate completely non-pic code, corresponding to what gcc -static produces on PPC. This is used for building kexts and other things. With this, materializing the address of a global looks like: lis r2, ha16(L_H$non_lazy_ptr) la r3, lo16(L_H$non_lazy_ptr)(r2) we're still emitting stubs for functions, which is wrong. That is next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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6cee630070b1a7183ed56a8404e812629f5ca538 |
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01-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Allow itineraries to be passed through the Target Machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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581a8f79bc1ac3cbe5d621f0b4a0252ab2890bc1 |
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26-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Give full control of subtarget features over to table generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24013 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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34bd5d5d876212611d8b66a18f4c8604b342c6eb |
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25-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Preparation of supporting scheduling info. Need to find info based on selected CPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23974 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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2224dcc88c3f01c707cc7dfdb085975340bc0127 |
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24-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify this, matching changes in the tblgen emitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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f5fc2cbd6bcf80cc34c8114007f31d8ffd1d138d |
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21-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Plugin new subtarget backend into the build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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9d2b817fcbad2ee615be323c38f1ed66d81964dc |
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18-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Do the right thing and enable 64 bit regs under the control of a subtarget option. Currently the only way to enable this is to specify the 64bitregs mattr flag. It is never enabled by default on any config yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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2668959b8879097db368aec7d76c455260abc75b |
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15-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Rename PowerPC*.h to PPC*.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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c98d8236490666ad3f5c9224226bda12269fed77 |
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07-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
On non-apple systems, when using -march=ppc32, do not print: '' is not a recognized processor for this target (ignoring processor) Default to "generic" instead of "" for the default CPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23257 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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d401dff7966ca3ac644cddcda4f1e6d30074923e |
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06-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Add accessor for 64bit flag, so that we can tell when it is safe to generate the fun in-register fp<->long instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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839615a510c582ddcdb09a8e2934f30775daa032 |
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02-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
Add help support for -mcpu and -mattr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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1e9de3ed2db440fac99e5cc85b7d98b0a23a2727 |
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02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Decouple fsqrt from gpul optimizations, implementing fsqrt.ll. Remove the -enable-gpopt option which is subsumed by feature flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23218 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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b1e1180ca0b32f37aa74d7ad703eeaf91e66c8fa |
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01-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Use SubtargetFeatures in llc/lli. 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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3c304a3ba18a040d3c3dbd15ab69da5543cdbd54 |
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06-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Consolidate the GPOpt stuff to all use the Subtarget, instead of still depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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ba253651402f5d12172b3feed8909e28d01b7e1d |
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05-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Enable gp optimizations by default when available, even when a target triple is available, since the target triple doesn't specify whether to use gpopts or not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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8c00f8cdc7ae0cdd18d91b3a31a70da0f78aa04f |
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04-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Add Subtarget support to PowerPC. Next up, using it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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