| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 43 /// FramePtr - X86 physical register used as frame ptr.
45 unsigned FramePtr; member in class:llvm::final
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| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.cpp | 113 unsigned FramePtr)
119 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
139 .addReg(FramePtr);
157 .addReg(FramePtr);
108 replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II, MachineInstr &MI, DebugLoc dl, unsigned FIOperandNum, int Offset, unsigned FramePtr) argument
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| /external/llvm/lib/CodeGen/ |
| H A D | SjLjEHPrepare.cpp | 412 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0, local
416 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true);
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| /external/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 108 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
164 if (Reg == FramePtr)
241 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
247 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
254 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
339 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
368 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
376 .addReg(FramePtr));
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| H A D | ARMAsmPrinter.cpp | 1093 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
1199 if (DstReg == FramePtr && FramePtr != ARM::SP)
1202 ATS.emitSetFP(FramePtr, ARM::SP, -Offset);
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| H A D | ARMExpandPseudoInsts.cpp | 915 unsigned FramePtr = RI.getFrameRegister(MF); local
921 FramePtr, -NumBytes, ARMCC::AL, 0, *TII);
924 FramePtr, -NumBytes, *TII, RI);
927 FramePtr, -NumBytes, ARMCC::AL, 0,
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| H A D | ARMFrameLowering.cpp | 313 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
372 if (Reg == FramePtr)
527 dl, TII, FramePtr, ARM::SP,
532 nullptr, MRI->getDwarfRegNum(FramePtr, true),
540 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
710 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
748 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes,
760 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
770 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
774 .addReg(FramePtr));
1497 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
[all...] |
| H A D | ARMFastISel.cpp | 2491 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); local
2492 unsigned SrcReg = FramePtr;
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 206 unsigned FramePtr) const {
239 if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) {
407 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
476 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true);
507 emitCalleeSavedFrameMoves(MBB, MBBI, FramePtr);
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| H A D | AArch64FastISel.cpp | 3311 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); local
3314 TII.get(TargetOpcode::COPY), SrcReg).addReg(FramePtr);
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable
152 FramePtr));
306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0);
309 MRI->getDwarfRegNum(FramePtr, true));
385 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr);
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