History log of /external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cddc3e03e4ec99c0268c03a126195173e519ed58 04-Mar-2016 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r256229

http://b/26987366

(cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383)

Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
6948897e478cbd66626159776a8017b3c18579b9 01-Jul-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r239765

Bug: 20140355: This rebase pulls the upstream fix for the spurious
warnings mentioned in the bug.

Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
0c7f116bb6950ef819323d855415b2f2b0aad987 06-May-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r235153

Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
4c5e43da7792f75567b693105cc53e3f1992ad98 08-Apr-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master llvm for rebase to r233350

Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
ebe69fe11e48d322045d5949c83283927a0d790b 23-Mar-2015 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r230699.

Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
37ed9c199ca639565f6ce88105f9e39e898d82d0 01-Dec-2014 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
c6a4f5e819217e1e12c458aed8e7b122e23a3a58 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
54ed08e250a76b570c2162d49633e11b8ebb2d98 09-Dec-2013 Tim Northover <tnorthover@apple.com> Merge r196725 (conflicts on same API as before):
------------------------------------------------------------------------
r196725 | tnorthover | 2013-12-08 15:56:50 +0000 (Sun, 08 Dec 2013) |
19 lines

ARM: fix folding of stack-adjustment (yet again).

When trying to eliminate an "sub sp, sp, #N" instruction by folding
it into an existing push/pop using dummy registers, we need to account
for the fact that this might affect precisely how "fp" gets set in the
prologue.

We were attempting this, but assuming that *whenever* we performed a
fold it would make a difference. This is false, for example, in:
push {r4, r7, lr}
add fp, sp, #4
vpush {d8}
sub sp, sp, #8

we can fold the "sub" into the "vpush", forming "vpush {d7, d8}".
However, in that case the "add fp" instruction mustn't change, which
we were getting wrong before.

Should fix PR18160.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
e8098892f517c492193f8f8ebdcbb861d7a7b54a 08-Dec-2013 Tim Northover <tnorthover@apple.com> Merging r196493. Simple conflict due to change API of updated
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
1b26fdbf1f01e90b803cc035b6b932cd95c76830 02-Dec-2013 Bill Wendling <isanbard@gmail.com> Merging r196046:
------------------------------------------------------------------------
r196046 | tnorthover | 2013-12-01 06:16:24 -0800 (Sun, 01 Dec 2013) | 8 lines

ARM: fix bug in -Oz stack adjustment folding

Previously, we clobbered callee-saved registers when folding an "add
sp, #N" into a "pop {rD, ...}" instruction. This change checks whether
a register we're going to add to the "pop" could actually be live
outside the function before doing so and should fix the issue.

This should fix PR18081.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
323ac85d6ad7ba5d9593d8e151d879bd91d82e08 08-Nov-2013 Tim Northover <tnorthover@apple.com> ARM: fold prologue/epilogue sp updates into push/pop for code size

ARM prologues usually look like:
push {r7, lr}
sub sp, sp, #4

If code size is extremely important, this can be optimised to the single
instruction:
push {r6, r7, lr}

where we don't actually care about the contents of r6, but pushing it subtracts
4 from sp as a side effect.

This should implement such a conversion, predicated on the "minsize" function
attribute (-Oz) since I've yet to find any code it actually makes faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
e53abc20724ddde4e91467671328b531361a734f 05-Nov-2013 Tim Northover <tnorthover@apple.com> ARM: remove unnecessary state-tracking during frame lowering.

ResolveFrameIndex had what appeared to be a very nasty hack for when the
frame-index referred to a callee-saved register. In this case it "adjusted" the
offset so that the address was correct if (and only if) the MachineInstr
immediately followed the respective push.

This "worked" for all forms of GPR & DPR but was only ever used to set the
frame pointer itself, and once this was put in a more sensible location the
entire state-tracking machinery it relied on became redundant. So I stripped
it.

The only wrinkle is that "add r7, sp, #0" might theoretically be slower (need
an actual ALU slot) compared to "mov r7, sp" so I added a micro-optimisation
that also makes emitARMRegUpdate and emitT2RegUpdate also work when NumBytes ==
0.

No test changes since there shouldn't be any functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194025 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
bba9390fc6c0d536172c6bb4a9c93db557c1aff4 01-Oct-2013 Tim Northover <tnorthover@apple.com> ARM: support interrupt attribute

This function-attribute modifies the callee-saved register list and function
epilogue (specifically the return instruction) so that a routine is suitable
for use as an interrupt-handler of the specified type without disrupting
user-mode applications.

rdar://problem/14207019

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
083bc97344d618884ef04bc1ba1fc4ddf14d867d 20-May-2013 Stepan Dyatkovskiy <stpworld@narod.ru> PR15868 fix.

Introduction:
In case when stack alignment is 8 and GPRs parameter part size is not N*8:
we add padding to GPRs part, so part's last byte must be recovered at
address K*8-1.
We need to do it, since remained (stack) part of parameter starts from
address K*8, and we need to "attach" "GPRs head" without gaps to it:

Stack:
|---- 8 bytes block ----| |---- 8 bytes block ----| |---- 8 bytes...
[ [padding] [GPRs head] ] [ ------ Tail passed via stack ------ ...

FIX:
Note, once we added padding we need to correct *all* Arg offsets that are going
after padded one. That's why we need this fix: Arg offsets were never corrected
before this patch. See new test-cases included in patch.

We also don't need to insert padding for byval parameters that are stored in GPRs
only. We need pad only last byval parameter and only in case it outsides GPRs
and stack alignment = 8.
Though, stack area, allocated for recovered byval params, must satisfy
"Size mod 8 = 0" restriction.

This patch reduces stack usage for some cases:
We can reduce ArgRegsSaveArea since inner N*4 bytes sized byval params my be
"packed" with alignment 4 in some cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
f65e4932f83ac0c36594d97fca73dc9a9fd26672 30-Apr-2013 Stepan Dyatkovskiy <stpworld@narod.ru> Refactoring patch.
1. VarArgStyleRegisters: functionality that emits "store" instructions for byval regs moved out into separated method "StoreByValRegs". Before this patch VarArgStyleRegisters had confused use-cases. It was used for both variadic functions and for regular functions with byval parameters. In last case it created new stack-frame and registered it as VarArg frame, that is wrong.

This patch replaces VarArgsStyleRegisters usage for byval parameters with StoreByValRegs method.

2. In ARMMachineFunctionInfo, "get/setVarArgsRegSaveSize" was renamed to "get/setArgRegsSaveSize". By the same reason. Sometimes it was used for variadic functions, and sometimes for byval parameters in regular functions. Actually, this property means the size of registers, that keeps arguments, and thats why it was renamed.

3. In ARMISelLowering.cpp, ARMTargetLowering class, in methods computeRegArea and StoreByValRegs, VARegXXXXXX was renamed to ArgRegsXXXXXX still by the same reasons.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
dc3beb90178fc316f63790812b22201884eaa017 23-Mar-2013 Hal Finkel <hfinkel@anl.gov> Allow the register scavenger to spill multiple registers

This patch lets the register scavenger make use of multiple spill slots in
order to guarantee that it will be able to provide multiple registers
simultaneously.

To support this, the RS's API has changed slightly: setScavengingFrameIndex /
getScavengingFrameIndex have been replaced by addScavengingFrameIndex /
isScavengingFrameIndex / getScavengingFrameIndices.

In forthcoming commits, the PowerPC backend will use this capability in order
to implement the spilling of condition registers, and some special-purpose
registers, without relying on r0 being reserved. In some cases, spilling these
registers requires two GPRs: one for addressing and one to hold the value being
transferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
0cc52c67dbc2e073e3f7f34e05e3e7cd17ba9745 14-Mar-2013 Hal Finkel <hfinkel@anl.gov> Move estimateStackSize from ARM into MachineFrameInfo

This is a generic function (derived from PEI); moving it into
MachineFrameInfo eliminates a current redundancy between the ARM and AArch64
backends, and will allow it to be used by the PowerPC target code.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
700ed80d3da5e98e05ceb90e9bfb66058581a6db 21-Feb-2013 Eli Bendersky <eliben@google.com> Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
831737d329a727f53a1fb0572f7b7a8127208881 30-Dec-2012 Bill Wendling <isanbard@gmail.com> Remove the Function::getFnAttributes method in favor of using the AttributeSet
directly.

This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
38b06020dbd804f01ee3802779a52c05cffdf87d 21-Dec-2012 Roman Divacky <rdivacky@freebsd.org> Remove duplicate includes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
be06aacaa9a270384599bbfa850b967e9996b9fb 20-Dec-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MF argument to MI::copyImplicitOps().

This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170797 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
034b94b17006f51722886b0f2283fb6fb19aca1f 19-Dec-2012 Bill Wendling <isanbard@gmail.com> Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
61fac6810ff8686c5302dedb35d52cc662a983fe 27-Oct-2012 Kaelyn Uhrain <rikka@google.com> Avoid an unused-variable warning when asserts are disabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
be5ec8c4b2c1495faef5fd11f212ef1a655538fb 26-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> 80 col.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
b1f994af589af28dead4826d2e58a0138105e452 26-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove ARMBaseRegisterInfo::isReservedReg().

It is just as easy to use MRI::isReserved() now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
9aa6e0a134358c681cc5918ec65b1ec9726b778e 17-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().

All callers of these functions really want the isPhysRegOrOverlapUsed()
functionality which also checks aliases. For historical reasons, targets
without register aliases were calling isPhysRegUsed() instead.

Change isPhysRegUsed() to also check aliases, and switch all
isPhysRegOrOverlapUsed() callers to isPhysRegUsed().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
6765834754cbb3cb0f15b4b15e98c5e73fa50066 09-Oct-2012 Bill Wendling <isanbard@gmail.com> Create enums for the different attributes.

We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
2c189061184925c6a8ecbb5a19e648b230a41c0e 26-Sep-2012 Bill Wendling <isanbard@gmail.com> Remove the `hasFnAttr' method from Function.

The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
e94ac8871a1ac79bece57335d2abece0feed9c02 03-Aug-2012 Eric Christopher <echristo@apple.com> Add support for the ARM GHC calling convention, this patch was in 3.0,
but somehow managed to be dropped later.

Patch by Karel Gardas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
420761a0f193e87d08ee1c51b26bba23ab4bac7f 20-Apr-2012 Craig Topper <craig.topper@gmail.com> Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
aa395e8c5dcc6d13f1f8ae65ce89f36383cb714a 06-Apr-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Eliminate iOS-specific tail call instructions.

After register masks were introdruced to represent the call clobbers, it
is no longer necessary to have duplicate instruction for iOS.

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
055a8127c9ffee287807fe7cc1b115d0f40162b0 20-Mar-2012 Bob Wilson <bob.wilson@apple.com> Remove some redundant checks.

ARMFrameLowering::hasReservedCallFrame is already checking for variable
sized objects, so there's no point in checking it twice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
28f08c93e75d291695ea89b9004145103292e85b 05-Mar-2012 Jim Grosbach <grosbach@apple.com> ARM refactor away a bunch of VLD/VST pseudo instructions.

With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
015f228861ef9b337366f92f637d4e8d624bb006 04-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store registers in callee saved register tables to reduce size of static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
0f9d07fb2526c0acdf7ad9fa6e9c1a97a746c0e9 28-Feb-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Enable ARM base pointer when calling functions with large arguments.

When an outgoing call takes more than 2k of arguments on the stack, we
don't allocate that call frame in the prolog, but adjust the stack
pointer immediately before the call instead.

This causes problems with the emergency spill slot because PEI can't
track stack pointer adjustments on the second pass, and if the outgoing
arguments are too big, SP can't be used to reach the emergency spill
slot at all.

Work around these problems by ensuring there is a base or frame pointer
that can be used to access the emergency spill slot.

<rdar://problem/10917166>

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
120cfdf0e0a53f858970874476a21cffb8069847 24-Feb-2012 Benjamin Kramer <benny.kra@googlemail.com> Remove unused cl::opt, make another opt static.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
bad1e6b8e0dd51a15f6f2cae4f9d7815120f2471 06-Jan-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Enable aligned NEON spilling by default.

Experiments show this to be a small speedup for modern ARM cores.

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
afad0fe59a791cb4fd87fbd7ea2b1aba8d67a7af 04-Jan-2012 Evan Cheng <evan.cheng@apple.com> Fix more places which should be checking for iOS, not darwin.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
43ea32ca042214c28b7abba9c10f470ac5ade405 24-Dec-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Fix Comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
f06f6f50e9844b88cfbb9fb896fff9c3a752966b 23-Dec-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Experimental support for aligned NEON spills.

ARM targets with NEON units have access to aligned vector loads and
stores that are potentially faster than unaligned operations.

Add support for spilling the callee-saved NEON registers to an aligned
stack area using 16-byte aligned NEON loads and store.

This feature is off by default, controlled by an -align-neon-spills
command line option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147211 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07 21-Dec-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Move common code into an MRI function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd 07-Dec-2011 Evan Cheng <evan.cheng@apple.com> Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 02-Dec-2011 Nick Lewycky <nicholas@mxc.ca> Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
6690bca623d1f6405b95db5b1760f7ba8436e3fb 20-Oct-2011 Chad Rosier <mcrosier@apple.com> Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
fe04757f5e06ab15208ac0a2ab8d7e83c62b9f0d 18-Oct-2011 Chad Rosier <mcrosier@apple.com> Add support for dynamic stack realignment when in thumb1 mode.
rdar://10288916


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
2bfaf521aed6d486b2d80dbf12b84b456100cb47 01-Oct-2011 Chad Rosier <mcrosier@apple.com> Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."
to appease nightly testers. Not quite there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
52490411259ccc34b8c59f3532e78442a46fffd7 01-Oct-2011 Chad Rosier <mcrosier@apple.com> Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact
useful if an optimization assumes the stack has been realigned. Credit to
Eli for his assistance.
rdar://10043857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
51f6a7abf27fc92c3d8904c2334feab8b498e8e9 09-Sep-2011 Owen Anderson <resistor@mac.com> Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
8e0c7697fd9b9354856074efc06eea9f6d80015c 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Tidy up. Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
b9ca5124f8a5d593f57cbd0566867578a51d7055 25-Aug-2011 Andrew Trick <atrick@apple.com> ARM fix for missing implicit operands on ldmia_ret.

rdar://10005094: miscompile of 176.gcc


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
51972da57615d7d31372dd1fef120333ef2d799c 25-Aug-2011 Andrew Trick <atrick@apple.com> whitespace


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
19dec207fcc0f04902b7f097b7771ba7abba43fb 05-Aug-2011 Jim Grosbach <grosbach@apple.com> ARM refactor indexed store instructions.

Refactor STR[B] pre and post indexed instructions to use addressing modes for
memory operands, which is necessary for assembly parsing and is more consistent
with the rest of the memory instruction definitions. Make some incremental
progress on refactoring away the mega-operand addrmode2 along the way, which
is nice.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
793e79601f0fd68ba082fa2016018f80b2379460 26-Jul-2011 Owen Anderson <resistor@mac.com> Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
ee04a6d3a40c3017124e3fd89a0db473a2824498 21-Jul-2011 Evan Cheng <evan.cheng@apple.com> Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
bc20e4f2dc11e346505f11efea22d9a1d3919eca 05-Jul-2011 Jim Grosbach <grosbach@apple.com> ARM estimateStackSize() needs to account for simplified call frames.

If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.

rdar://9715469


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
2a7b41ba4d3eb3c6003f6768dc20b28d83eac265 01-Jul-2011 Jim Grosbach <grosbach@apple.com> Refact ARM Thumb1 tMOVr instruction family.

Merge the tMOVr, tMOVgpr2tgpr, tMOVtgpr2gpr, and tMOVgpr2gpr instructions
into tMOVr. There's no need to keep them separate. Giving the tMOVr
instruction the proper GPR register class for its operands is sufficient
to give the register allocator enough information to do the right thing
directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 01-Jul-2011 Jim Grosbach <grosbach@apple.com> Thumb1 register to register MOV instruction is predicable.

Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
cd4e0b593db6dfdb5cedbde47ea6603058b8ac6c 17-Jun-2011 Cameron Zwarich <zwarich@apple.com> Update an insertion point iterator after replacing a return instruction with a
tail call pseudoinstruction. This fixes <rdar://problem/9624333>.

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
7980f61f5ff408b947474cd1c3715896d28ea578 13-Jun-2011 Jim Grosbach <grosbach@apple.com> Fix coordination for using R4 in Thumb1 as a scratch for SP restore.

The logic for reserving R4 for use as a scratch needs to match that for
actually using it. Also, it's not necessary for immediate <=508, so adjust
the value checked.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
db6cbe1ff16d5f18bf2469fa53744e680944dc56 22-Apr-2011 Evan Cheng <evan.cheng@apple.com> In Thumb2 mode, lower frame indix references to:
add <rd>, sp, #<imm8>
ldr <rd>, [sp, #<imm8>]
When the offset from sp is multiple of 4 and in range of 0-1020.
This saves code size by utilizing 16-bit instructions.

rdar://9321541


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
5edf24efac40062766c643e08f11bc509d373370 15-Mar-2011 Jim Grosbach <grosbach@apple.com> Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the
encoding would be incorrect for some Thumb instructions (the indirect calls).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
57caad7a33ff145b71545f10dcfbbf2fd0f595d3 05-Mar-2011 Anton Korobeynikov <asl@math.spbu.ru> Preliminary support for ARM frame save directives emission via MI flags.
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
9831f2d585816fc293504ea66e40e8a6c5a5d702 25-Feb-2011 Evan Cheng <evan.cheng@apple.com> Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
acca09bd64080393a047204eafad46e2fc34ee68 25-Feb-2011 Evan Cheng <evan.cheng@apple.com> Each prologue may have multiple vpush instructions to store callee-saved
D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.

Sorry, can't reduce a small test case.
rdar://9043312


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
727961a1a3507a8f7e47ba80a1e37fc68bfc8199 15-Feb-2011 Bob Wilson <bob.wilson@apple.com> Remove unused bitvectors that record ARM callee-saved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
7cfa656ad84306ded61f0a3c7a8862505f48c239 25-Jan-2011 Evan Cheng <evan.cheng@apple.com> Don't merge restore with tail call instruction.

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
955ed73d12f2b186ef3f80da872b702cd7f2895b 18-Jan-2011 Jeffrey Yasskin <jyasskin@google.com> Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
df55fea807835bc23a2879fbf7f7a8bd53de8256 16-Jan-2011 Evan Cheng <evan.cheng@apple.com> Spill R4 if it's going to be used to restore SP from FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
4f28c1c71450c711e96aa283de53739d8b4504cd 13-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Teach frame lowering to ignore debug values after the terminators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
422578547e0e3464af7ae23305c54dd71a8bd9e9 13-Jan-2011 Bob Wilson <bob.wilson@apple.com> Tidy comments, indentation, and 80-column violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bd 11-Jan-2011 Evan Cheng <evan.cheng@apple.com> Clean up ARM subtarget code by using Triple ADT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
4dd312f2334a215cfc7961518823ef36884b4c95 11-Jan-2011 Eric Christopher <echristo@apple.com> Expand on the safeness of restoring the sp from the fp a bit more.


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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

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/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp