| /external/llvm/bindings/python/llvm/tests/ |
| H A D | test_bitreader.py | 2 from ..core import OpCode namespace
|
| H A D | test_core.py | 7 from ..core import OpCode namespace
117 inst_list = [('arg1', OpCode.ExtractValue),
118 ('arg2', OpCode.ExtractValue),
119 ('', OpCode.Call),
120 ('', OpCode.Ret)]
|
| /external/llvm/bindings/python/llvm/ |
| H A D | bit_reader.py | 8 from .core import OpCode namespace
|
| H A D | core.py | 24 "OpCode",
82 class OpCode(LLVMEnumeration): class in inherits:LLVMEnumeration
83 """Represents an individual OpCode enumeration."""
88 super(OpCode, self).__init__(name, value)
417 return OpCode.from_value(lib.LLVMGetInstructionOpcode(self))
594 (OpCode, enumerations.OpCodes),
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreLowerThreadLocal.cpp | 80 unsigned OpCode = CE->getOpcode(); local
81 switch (OpCode) {
105 Builder.CreateBinOp((Instruction::BinaryOps)OpCode,
121 Builder.CreateCast((Instruction::CastOps)OpCode,
|
| H A D | XCoreRegisterInfo.cpp | 169 unsigned OpCode = MI.getOpcode(); local
172 if (OpCode==XCore::STWFI) {
182 switch (OpCode) {
|
| /external/llvm/include/llvm/IR/ |
| H A D | Instruction.h | 114 static const char* getOpcodeName(unsigned OpCode);
116 static inline bool isTerminator(unsigned OpCode) { argument
117 return OpCode >= TermOpsBegin && OpCode < TermOpsEnd;
140 /// @brief Determine if the OpCode is one of the CastInst instructions.
141 static inline bool isCast(unsigned OpCode) { argument
142 return OpCode >= CastOpsBegin && OpCode < CastOpsEnd;
145 /// @brief Determine if the OpCode is one of the FuncletPadInst instructions.
146 static inline bool isFuncletPad(unsigned OpCode) { argument
[all...] |
| /external/llvm/lib/IR/ |
| H A D | Instruction.cpp | 195 const char *Instruction::getOpcodeName(unsigned OpCode) { argument
196 switch (OpCode) {
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 946 unsigned OpCode = (RISBG.Mask == 0xff ? SystemZ::LLGCR : SystemZ::LLGHR); local
949 OpCode = (RISBG.Mask == 0xff ? SystemZ::LLCRMux : SystemZ::LLHRMux);
951 OpCode = (RISBG.Mask == 0xff ? SystemZ::LLCR : SystemZ::LLHR);
955 N = CurDAG->getMachineNode(OpCode, DL, VT, In);
|
| /external/nanohttpd/websocket/src/main/java/fi/iki/elonen/ |
| H A D | NanoWSD.java | 53 import fi.iki.elonen.NanoWSD.WebSocketFrame.OpCode;
71 private WebSocketFrame.OpCode continuousOpCode = null;
191 if (frame.getOpCode() != OpCode.Continuation) {
218 if (frame.getOpCode() == OpCode.Close) {
220 } else if (frame.getOpCode() == OpCode.Ping) {
221 sendFrame(new WebSocketFrame(OpCode.Pong, true, frame.getBinaryPayload()));
222 } else if (frame.getOpCode() == OpCode.Pong) {
224 } else if (!frame.isFin() || frame.getOpCode() == OpCode.Continuation) {
228 } else if (frame.getOpCode() == OpCode.Text || frame.getOpCode() == OpCode
384 public static enum OpCode { enum in class:NanoWSD.WebSocketFrame
403 private OpCode(int code) { method in class:NanoWSD.WebSocketFrame.OpCode
[all...] |
| /external/pdfium/core/src/fpdfapi/fpdf_page/ |
| H A D | pageint.h | 153 struct OpCode { struct in class:CPDF_StreamContentParser
157 static const OpCode g_OpCodes[];
|
| /external/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 186 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
188 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
586 unsigned OpCode, Flags = 0; local
587 if (Token.isError() || parseInstruction(OpCode, Flags))
635 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
769 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) { argument
777 if (parseInstrName(InstrName, OpCode))
1750 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) { argument
1755 OpCode = InstrInfo->getValue();
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 746 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL; local
782 BuildMI(MBB, MI, dl, get(OpCode), DestReg)
|
| /external/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 906 unsigned OpCode) const;
1088 unsigned OpCode) const {
1089 if (OpCode == Instruction::Add)
1091 if (OpCode == Instruction::Sub)
1093 if (OpCode == Instruction::Mul)
1106 const unsigned OpCode = DU.NarrowUse->getOpcode(); local
1108 if (OpCode != Instruction::Add && OpCode != Instruction::Sub &&
1109 OpCode != Instruction::Mul)
1143 dyn_cast<SCEVAddRecExpr>(getSCEVByOpCode(lhs, rhs, OpCode));
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 858 int OpCode = doesNotReturn ? HexagonISD::CALLv3nr : HexagonISD::CALLv3; local
859 Chain = DAG.getNode(OpCode, dl, NodeTys, Ops);
|
| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstructionCombining.cpp | 406 static Value *getIdentityValue(Instruction::BinaryOps OpCode, Value *V) { argument
410 if (OpCode == Instruction::Mul)
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2518 unsigned OpCode = 0; local
2521 OpCode = Mips::BNE;
2524 OpCode = Mips::BEQ;
2533 emitRRX(OpCode, DstRegOp.getReg(), Mips::ZERO, MemOffsetOp, IDLoc,
2546 emitRRX(OpCode, DstRegOp.getReg(), ATReg, MemOffsetOp, IDLoc, Instructions);
|
| /external/mesa3d/src/mesa/main/ |
| H A D | dlist.c | 493 } OpCode; typedef in typeref:enum:__anon14261
510 OpCode opcode;
595 is_ext_opcode(OpCode opcode)
651 const OpCode opcode = n[0].opcode;
977 dlist_alloc(struct gl_context *ctx, OpCode opcode, GLuint bytes)
1030 Node *n = dlist_alloc(ctx, (OpCode) opcode, bytes);
1078 alloc_instruction(struct gl_context *ctx, OpCode opcode, GLuint nparams)
7692 const OpCode opcode = n[0].opcode;
10703 const OpCode opcode = n[0].opcode;
|
| /external/guice/extensions/persist/lib/ |
| H A D | oro-2.0.8.jar | META-INF/ META-INF/MANIFEST.MF org/ org/apache/ org/apache/oro/ org/apache/oro/io/ ... |