/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZCallingConv.h | 40 SystemZCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, argument 42 : CCState(CC, isVarArg, MF, locs, C) {}
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H A D | SystemZISelLowering.cpp | 1176 MachineFunction &MF, bool isVarArg, 1184 CCState RetCCInfo(CallConv, isVarArg, MF, RetLocs, Context); 1175 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument
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/external/doclava/src/com/google/doclava/ |
H A D | ParameterInfo.java | 27 public ParameterInfo(String name, String typeName, TypeInfo type, boolean isVarArg, argument 32 mIsVarArg = isVarArg; 62 boolean isVarArg() { method in class:ParameterInfo
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H A D | Converter.java | 226 private static ParameterInfo convertParameter(Parameter p, SourcePosition pos, boolean isVarArg) { argument 229 new ParameterInfo(p.name(), p.typeName(), Converter.obtainType(p.type()), isVarArg, 240 boolean isVarArg = (m.isVarArgs() && i == len - 1); 241 q[i] = Converter.convertParameter(p[i], pos, isVarArg);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsCCState.h | 67 MipsCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, argument 70 : CCState(CC, isVarArg, MF, locs, C), SpecialCallingConv(SpecialCC) {}
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/external/llvm/include/llvm/IR/ |
H A D | DerivedTypes.h | 106 ArrayRef<Type*> Params, bool isVarArg); 110 static FunctionType *get(Type *Result, bool isVarArg); 120 bool isVarArg() const { return getSubclassData()!=0; } function in class:llvm::FunctionType
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/external/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 28 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, argument 30 : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 51 bool isVarArg, 67 bool isVarArg, 48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 64 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 621 bool isVarArg = AFI->getArgRegsSaveSize() > 0; local 632 if (isVarArg)
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H A D | ARMFrameLowering.cpp | 966 bool isVarArg, bool NoGap, 1000 if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt && 1343 bool isVarArg = AFI->getArgRegsSaveSize() > 0; local 1354 emitPopInst(MBB, MI, CSI, FltOpc, 0, isVarArg, true, &isARMArea3Register, 1356 emitPopInst(MBB, MI, CSI, PopOpc, LdrOpc, isVarArg, false, 1358 emitPopInst(MBB, MI, CSI, PopOpc, LdrOpc, isVarArg, false, 1841 if (MF.getFunction()->isVarArg()) 962 emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, unsigned LdmOpc, unsigned LdrOpc, bool isVarArg, bool NoGap, bool(*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs) const argument
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H A D | ARMFastISel.cpp | 196 bool isVarArg); 204 bool isVarArg); 208 unsigned &NumBytes, bool isVarArg); 1837 bool isVarArg) { 1842 if (Subtarget->hasVFP2() && !isVarArg) { 1853 TM.Options.FloatABIType == FloatABI::Hard && !isVarArg) 1861 if (!isVarArg) 1884 bool isVarArg) { 1886 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); 1888 CCAssignFnForCall(CC, false, isVarArg)); 1835 CCAssignFnForCall(CallingConv::ID CC, bool Return, bool isVarArg) argument 1877 ProcessCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument 2023 FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, const Instruction *I, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument 2297 bool isVarArg = FTy->isVarArg(); local [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 262 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, 272 bool isVarArg() const { return IsVarArg; } function in class:llvm::CCState
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/external/llvm/lib/IR/ |
H A D | Function.cpp | 229 bool Function::isVarArg() const { function in class:Function 230 return getFunctionType()->isVarArg(); 485 if (FT->isVarArg())
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H A D | Type.cpp | 174 return cast<FunctionType>(this)->isVarArg(); 356 ArrayRef<Type*> Params, bool isVarArg) { 358 FunctionTypeKeyInfo::KeyTy Key(ReturnType, Params, isVarArg); 366 new (FT) FunctionType(ReturnType, Params, isVarArg); 375 FunctionType *FunctionType::get(Type *Result, bool isVarArg) { argument 376 return get(Result, None, isVarArg); 355 get(Type *ReturnType, ArrayRef<Type*> Params, bool isVarArg) argument
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H A D | LLVMContextImpl.h | 126 bool isVarArg; member in struct:llvm::FunctionTypeKeyInfo::KeyTy 128 ReturnType(R), Params(P), isVarArg(V) {} 131 isVarArg(FT->isVarArg()) {} 135 if (isVarArg != that.isVarArg) 155 Key.isVarArg);
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H A D | Verifier.cpp | 415 bool VerifyIntrinsicIsVarArg(bool isVarArg, 1594 if (TargetFuncType->isVarArg()) { 1743 Assert(!F.isVarArg(), "Calling convention does not support varargs or " 2311 if (FTy->isVarArg()) 2342 if (FTy->isVarArg()) { 2463 Assert(CallerTy->isVarArg() == CalleeTy->isVarArg(), 3432 Verifier::VerifyIntrinsicIsVarArg(bool isVarArg, argument 3438 return isVarArg; 3448 return !isVarArg; [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 287 if (State.isVarArg()) { 368 bool isVarArg, 381 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); 401 bool isVarArg = CLI.IsVarArg; local 411 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 424 bool isVarArg, 438 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 443 if (isVarArg) { 522 CallingConv::ID CallConv, bool isVarArg, 535 CCState CCInfo(CallConv, isVarArg, DA 366 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 422 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 521 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 574 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 712 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
/external/llvm/examples/ExceptionDemo/ |
H A D | ExceptionDemo.cpp | 213 /// @param isVarArg function uses vararg arguments 222 bool isVarArg) { 224 llvm::FunctionType::get(retType, theArgTypes, isVarArg); 215 createFunction(llvm::Module &module, llvm::Type *retType, const ArgTypes &theArgTypes, const ArgNames &theArgNames, const std::string &functName, llvm::GlobalValue::LinkageTypes linkage, bool declarationOnly, bool isVarArg) argument
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/external/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1641 bool isVarArg, 1646 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 1638 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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H A D | SIISelLowering.cpp | 573 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 638 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 572 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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H A D | AMDGPUISelLowering.cpp | 571 bool isVarArg, 568 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1055 bool isVarArg = CLI.IsVarArg; local 1067 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 1123 CallingConv::ID CallConv, bool isVarArg, 1133 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 1144 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, 1262 bool isVarArg, 1274 return LowerCCCArguments(Chain, CallConv, isVarArg, 1286 bool isVarArg, 1299 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 1308 if (!isVarArg) 1122 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1260 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1284 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1452 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 1466 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 90 HexagonCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, argument 93 : CCState(CC, isVarArg, MF, locs, C), 558 CallingConv::ID CallConv, bool isVarArg, 567 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, 613 CallingConv::ID CallConv, bool isVarArg, 624 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, 655 bool isVarArg = CLI.IsVarArg; local 671 if (F->isVarArg() && F->getFunctionType()->getNumParams() != 0) 678 HexagonCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 681 if (isVarArg) 557 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 612 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SmallVectorImpl<SDValue> &OutVals, SDValue Callee) const argument 1025 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2758 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 387 bool isVarArg, 398 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 548 if (isVarArg) { 746 bool isVarArg = CLI.IsVarArg; local 753 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 995 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, 385 LowerFormalArguments_32(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2177 CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, 2180 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); 2191 CallingConv::ID CallConv, bool isVarArg, 2202 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); 2378 CallingConv::ID CallConv, bool isVarArg, 2386 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, 2650 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 2667 assert(!(isVarArg && canGuaranteeTCO(CallConv)) && 2680 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); 2809 if (Is64Bit && isVarArg 2176 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 2190 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 2377 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2649 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3060 bool isVarArg = CLI.IsVarArg; local 3671 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, Type *RetTy, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument [all...] |