/art/compiler/utils/arm/ |
H A D | managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); local 31 return ArmManagedRegister::FromCoreRegister(low).Overlaps(other) || 37 SRegister low = AsOverlappingDRegisterLow(); local 40 return (low == other_sreg) || (high == other_sreg); 54 int low; local 57 low = (r * 2) + kNumberOfCoreRegIds; // Return a SRegister. 60 low = (r - kNumberOfDRegIds) * 2; // Return a Register. 61 if (low > 6) { 63 low = 1; 66 return low; [all...] |
H A D | assembler_arm.h | 765 SRegister low = static_cast<SRegister>(sd << 1); local 766 SRegister high = static_cast<SRegister>(low + 1); 767 LoadSImmediate(low, bit_cast<float, uint32_t>(Low32Bits(int_value)), cond); 769 vmovs(high, low);
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/art/compiler/utils/arm64/ |
H A D | managed_register_arm64.cc | 67 int low = RegNo(); local 69 low += kNumberOfXRegIds; 71 low += kNumberOfXRegIds + kNumberOfWRegIds + kNumberOfDRegIds; 73 return low;
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/art/compiler/utils/mips/ |
H A D | managed_register_mips.cc | 30 Register low = AsRegisterPairLow(); local 32 return MipsManagedRegister::FromCoreRegister(low).Overlaps(other) || 38 FRegister low = AsOverlappingDRegisterLow(); local 41 return (low == other_freg) || (high == other_freg); 55 int low; local 58 low = (r * 2) + kNumberOfCoreRegIds; // Return an FRegister. 61 low = (r - kNumberOfDRegIds) * 2 + 2; // Return a Register. 62 if (low >= 24) { 64 low = 5; 67 return low; [all...] |
H A D | assembler_mips.cc | 1374 uint32_t low = Low32Bits(value); local 1376 LoadConst32(reg_lo, low); 1377 if (high != low) { 1415 uint32_t low = Low32Bits(value); local 1417 if (low == 0) { 1420 LoadConst32(temp, low); 1426 if (high != low) { 1443 uint32_t low = Low32Bits(value); local 1445 if (low == 0) { 1448 LoadConst32(temp, low); [all...] |
/art/compiler/utils/x86/ |
H A D | managed_register_x86.cc | 42 Register low; member in struct:art::x86::RegisterPairDescriptor 48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, 68 Register low = AsRegisterPairLow(); local 70 return X86ManagedRegister::FromCpuRegister(low).Overlaps(other) || 85 return kRegisterPairs[r].low;
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/art/compiler/utils/x86_64/ |
H A D | managed_register_x86_64.cc | 41 Register low; member in struct:art::x86_64::RegisterPairDescriptor 47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, 63 Register low = AsRegisterPairLow().AsRegister(); local 65 return X86_64ManagedRegister::FromCpuRegister(low).Overlaps(other) || 80 return kRegisterPairs[r].low;
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/art/runtime/jdwp/ |
H A D | jdwp_request.cc | 179 uint64_t low = Read4BE(); local 180 return (high << 32) | low;
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/art/compiler/optimizing/ |
H A D | locations.h | 130 static Location RegisterPairLocation(int low, int high) { argument 131 return Location(kRegisterPair, low << 16 | high); 134 static Location FpuRegisterPairLocation(int low, int high) { argument 135 return Location(kFpuRegisterPair, low << 16 | high); 163 int low() const { function in class:art::Location 188 return static_cast<T>(low()); 200 return static_cast<T>(low()); 215 return Location::RegisterLocation(low()); 217 return Location::FpuRegisterLocation(low());
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H A D | induction_var_analysis.cc | 154 uint32_t low = d1; local 156 low = std::min(low, VisitDescendant(loop, instruction->InputAt(i))); 160 if (low < d1) { 161 map_.find(instruction)->second.depth = low;
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H A D | code_generator.cc | 1014 int low = location.low(); local 1016 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(low)) { 1017 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(low); 1020 stack_map_stream_.AddDexRegisterEntry(DexRegisterLocation::Kind::kInFpuRegister, low); 1035 int low = location.low(); local 1037 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(low)) { 1038 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(low); 1041 stack_map_stream_.AddDexRegisterEntry(DexRegisterLocation::Kind::kInRegister, low); [all...] |
H A D | register_allocator.cc | 36 static bool IsLowOfUnalignedPairInterval(LiveInterval* low) { argument 37 return GetHighForLowRegister(low->GetRegister()) != low->GetHighInterval()->GetRegister(); 370 current->SetRegister(first.low()); 382 current->SetRegister(output.low()); 614 // Make sure a low interval is always with a high. 616 // Make sure a high interval is always with a low. 682 // Allocating the low part was unsucessful. The splitted interval for the high part 969 // 2) A pair interval whose high is not low + 1. 970 // 3) A pair interval whose low i 1279 LiveInterval* low = interval->GetLowInterval()->SplitAt(position); local [all...] |
H A D | ssa_liveness_analysis.h | 764 void SetLowInterval(LiveInterval* low) { argument 766 high_or_low_interval_ = low; 1116 // If this interval needs a register pair, the high or low equivalent. 1117 // `is_high_interval_` tells whether this holds the low or the high.
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H A D | code_generator_mips.cc | 591 // Use 2 temporary registers because we can't first swap the low 32 bits of an FPR and 1274 uint32_t low = Low32Bits(value); local 1276 if (IsUint<16>(low)) { 1277 if (dst_low != lhs_low || low != 0) { 1278 __ Ori(dst_low, lhs_low, low); 1281 __ LoadConst32(TMP, low); 1289 if (high != low) { 1295 uint32_t low = Low32Bits(value); local 1297 if (IsUint<16>(low)) { 1298 if (dst_low != lhs_low || low ! 1316 uint32_t low = Low32Bits(value); local 1342 int32_t low = Low32Bits(value); local [all...] |
H A D | code_generator_arm.cc | 44 return ((location.low() & 1) == 0) && (location.low() + 1 == location.high()); 561 // UnsafeGet's offset location is a register pair, the low 1278 // decided using the low words. 1279 // TODO: consider avoiding jumps with temporary and CMP low+SBC high 2412 Register low = in.AsRegisterPairLow<Register>(); local 2426 // out_d = unsigned-to-double(low) 2427 __ vmovsr(out_s, low); 3285 // For simplicity, use kOutputOverlap even though we only require that low registers 3344 Register low local [all...] |
H A D | code_generator_x86.cc | 578 // UnsafeGet's offset location is a register pair, the low 1199 // decided using the low words. 1682 // Clear output register: setb only sets the low byte. 3028 Immediate low(low_value); 3035 __ imull(in1_hi, low); 3039 __ movl(eax, low); 3764 Register low = loc.AsRegisterPairLow<Register>(); local 3768 __ addl(low, low); 3771 // Shift by 32 is easy. High gets low, an 3803 Register low = loc.AsRegisterPairLow<Register>(); local 3835 Register low = loc.AsRegisterPairLow<Register>(); local 5729 __ movl(Address(ESP, destination.GetStackIndex()), low); local 5756 __ movl(Address(ESP, destination.GetStackIndex()), low); local [all...] |
/art/runtime/native/ |
H A D | libcore_util_CharsetUtils.cc | 221 jchar low = (i + 1 != end) ? string->CharAt(i + 1) : 0; local 222 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) { 228 // Now we know we have a *valid* surrogate pair, we can consume the low surrogate. 230 ch = U16_GET_SUPPLEMENTARY(high, low);
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H A D | java_lang_Class.cc | 194 size_t low = 0; local 198 while (low < high) { 199 auto mid = (low + high) / 2; 205 low = mid + 1;
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/art/runtime/mirror/ |
H A D | class.cc | 635 size_t low = 0; local 638 while (low < high) { 639 size_t mid = (low + high) / 2; 648 low = mid + 1;
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