Searched refs:ArgRegs (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp198 SmallVectorImpl<unsigned> &ArgRegs,
1878 SmallVectorImpl<unsigned> &ArgRegs,
1945 unsigned Arg = ArgRegs[VA.getValNo()];
2209 SmallVector<unsigned, 8> ArgRegs; local
2213 ArgRegs.reserve(I->getNumOperands());
2230 ArgRegs.push_back(Arg);
2238 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags,
2320 SmallVector<unsigned, 8> ArgRegs; local
2325 ArgRegs.reserve(arg_size);
2363 ArgRegs
1877 ProcessCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp180 SmallVectorImpl<unsigned> &ArgRegs,
1266 SmallVectorImpl<unsigned> &ArgRegs,
1323 unsigned Arg = ArgRegs[VA.getValNo()];
1497 SmallVector<unsigned, 8> ArgRegs; local
1502 ArgRegs.reserve(NumArgs);
1528 ArgRegs.push_back(Arg);
1537 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags,
1265 processCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool IsVarArg) argument
H A DPPCISelLowering.cpp2578 static const MCPhysReg ArgRegs[] = { local
2582 const unsigned NumArgRegs = array_lengthof(ArgRegs);
2584 unsigned RegNum = State.getFirstUnallocated(ArgRegs);
2588 // allocated yet. RegNum is actually an index into ArgRegs, which means we
2591 State.AllocateReg(ArgRegs[RegNum]);
2605 static const MCPhysReg ArgRegs[] = { local
2610 const unsigned NumArgRegs = array_lengthof(ArgRegs);
2612 unsigned RegNum = State.getFirstUnallocated(ArgRegs);
2616 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) {
2617 State.AllocateReg(ArgRegs[RegNu
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/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1375 static const MCPhysReg ArgRegs[] = { local
1379 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs);
1380 if (FirstVAReg < array_lengthof(ArgRegs)) {
1384 for (int i = array_lengthof(ArgRegs) - 1; i >= (int)FirstVAReg; --i) {
1394 RegInfo.addLiveIn(ArgRegs[i], VReg);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3706 ArrayRef<MCPhysReg> ArgRegs = ABI.GetByValArgRegs(); local
3718 unsigned ArgReg = ArgRegs[FirstReg + I];
3768 unsigned ArgReg = ArgRegs[FirstReg + I];
3792 ArrayRef<MCPhysReg> ArgRegs = ABI.GetVarArgRegs(); local
3793 unsigned Idx = State.getFirstUnallocated(ArgRegs);
3804 if (ArgRegs.size() == Idx)
3810 (int)(RegSizeInBytes * (ArgRegs.size() - Idx));
3822 for (unsigned I = Idx; I < ArgRegs.size();
3824 unsigned Reg = addLiveIn(MF, ArgRegs[I], RC);
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp547 // Store remaining ArgRegs to the stack if this is a varargs function.
549 static const MCPhysReg ArgRegs[] = { local
552 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs);
553 const MCPhysReg *CurArgReg = ArgRegs+NumAllocated, *ArgRegEnd = ArgRegs+6;
/external/llvm/lib/Target/X86/
H A DX86FastISel.cpp2880 SmallVector<unsigned, 16> ArgRegs; local
2925 ArgRegs.push_back(ResultReg);
2957 unsigned ArgReg = ArgRegs[VA.getValNo()];

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