/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 109 CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet,
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H A D | HexagonISelLowering.cpp | 2760 CallingConv::ID CalleeCC, 2770 bool CCMatch = CallerCC == CalleeCC; 2758 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 426 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
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H A D | AArch64ISelLowering.cpp | 2690 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, 2698 if (!IsTailCallConvention(CalleeCC) && CalleeCC != CallingConv::C) 2704 bool CCMatch = CallerCC == CalleeCC; 2716 if (IsTailCallConvention(CalleeCC) && CCMatch) 2742 assert((!isVarArg || CalleeCC == CallingConv::C) && 2753 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs, 2756 CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CalleeCC, true)); 2766 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), RVLocs1, 2768 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForCall(CalleeCC, isVarAr 2689 isEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 612 CallingConv::ID CalleeCC,
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H A D | ARMISelLowering.cpp | 2076 CallingConv::ID CalleeCC, 2086 bool CCMatch = CallerCC == CalleeCC; 2128 ARMCCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), RVLocs1, 2130 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForNode(CalleeCC, true, isVarArg)); 2168 ARMCCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs, 2171 CCAssignFnForNode(CalleeCC, false, isVarArg)); 2075 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 707 CallingConv::ID CalleeCC,
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H A D | PPCISelLowering.cpp | 3846 CallingConv::ID CalleeCC, 3859 if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { 3845 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 985 CallingConv::ID CalleeCC,
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H A D | X86ISelLowering.cpp | 2525 CallingConv::ID CalleeCC = CS.getCallingConv(); local 2526 if (!mayTailCallThisCC(CalleeCC)) 3672 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, 3677 if (!mayTailCallThisCC(CalleeCC)) 3691 bool CCMatch = CallerCC == CalleeCC; 3692 bool IsCalleeWin64 = Subtarget->isCallingConvWin64(CalleeCC); 3702 if (canGuaranteeTCO(CalleeCC) && CCMatch) 3730 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs, 3751 CCState CCInfo(CalleeCC, false, DAG.getMachineFunction(), RVLocs, 3765 CCState CCInfo1(CalleeCC, fals 3671 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, Type *RetTy, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument [all...] |