Searched refs:CalleeCC (Results 1 - 10 of 10) sorted by relevance

/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h109 CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet,
H A DHexagonISelLowering.cpp2760 CallingConv::ID CalleeCC,
2770 bool CCMatch = CallerCC == CalleeCC;
2758 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h426 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
H A DAArch64ISelLowering.cpp2690 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
2698 if (!IsTailCallConvention(CalleeCC) && CalleeCC != CallingConv::C)
2704 bool CCMatch = CallerCC == CalleeCC;
2716 if (IsTailCallConvention(CalleeCC) && CCMatch)
2742 assert((!isVarArg || CalleeCC == CallingConv::C) &&
2753 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs,
2756 CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CalleeCC, true));
2766 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), RVLocs1,
2768 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForCall(CalleeCC, isVarAr
2689 isEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/ARM/
H A DARMISelLowering.h612 CallingConv::ID CalleeCC,
H A DARMISelLowering.cpp2076 CallingConv::ID CalleeCC,
2086 bool CCMatch = CallerCC == CalleeCC;
2128 ARMCCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), RVLocs1,
2130 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForNode(CalleeCC, true, isVarArg));
2168 ARMCCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs,
2171 CCAssignFnForNode(CalleeCC, false, isVarArg));
2075 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h707 CallingConv::ID CalleeCC,
H A DPPCISelLowering.cpp3846 CallingConv::ID CalleeCC,
3859 if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) {
3845 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.h985 CallingConv::ID CalleeCC,
H A DX86ISelLowering.cpp2525 CallingConv::ID CalleeCC = CS.getCallingConv(); local
2526 if (!mayTailCallThisCC(CalleeCC))
3672 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
3677 if (!mayTailCallThisCC(CalleeCC))
3691 bool CCMatch = CallerCC == CalleeCC;
3692 bool IsCalleeWin64 = Subtarget->isCallingConvWin64(CalleeCC);
3702 if (canGuaranteeTCO(CalleeCC) && CCMatch)
3730 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), ArgLocs,
3751 CCState CCInfo(CalleeCC, false, DAG.getMachineFunction(), RVLocs,
3765 CCState CCInfo1(CalleeCC, fals
3671 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, Type *RetTy, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument
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