| /external/llvm/include/llvm/MC/ |
| H A D | MCInstrAnalysis.h | 34 virtual bool isBranch(const MCInst &Inst) const { function in class:llvm::MCInstrAnalysis
35 return Info->get(Inst.getOpcode()).isBranch();
|
| H A D | MCInstrDesc.h | 233 bool isBranch() const { return Flags & (1 << MCID::Branch); } function in class:llvm::MCInstrDesc
244 return isBranch() & !isBarrier() & !isIndirectBranch();
252 return isBranch() & isBarrier() & !isIndirectBranch();
365 /// 3. Calling, branching, returning: use isCall/isReturn/isBranch.
|
| /external/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 35 if (isBranch() || isCall() || isReturn() || isIndirectBranch())
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 279 if (MCID.isBranch())
284 } else if (MCID.isBranch())
489 if (MCID.isBranch() || MCID.isCall()) {
572 if (MCID.isBranch() || MCID.isCall())
578 if (MCID.isBranch())
646 if (MCID.isBranch() ||
668 if (MCID.isBranch() ||
|
| H A D | HexagonShuffler.cpp | 262 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch())
311 if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch() ||
|
| H A D | HexagonAsmBackend.cpp | 186 MCID.isBranch()) ||
|
| H A D | HexagonMCChecker.cpp | 214 if (MCID.isBranch())
280 if (HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch() ||
|
| H A D | HexagonMCInstrInfo.cpp | 135 XMI.setOpcode((Desc.isBranch() || Desc.isCall() ||
407 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()) ||
409 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()))
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 61 if (!MCID->isBranch())
178 if (CurSlots == 5 || (MCID->isBranch() && CurBranches == 1)) {
199 if (MCID->isBranch())
|
| H A D | PPCEarlyReturn.cpp | 123 } else if (J->isBranch()) {
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 192 /// @param isBranch - If the instruction is a branch instruction
202 /// returns zero and isBranch is true then a symbol look up for immediate Value
206 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, argument
210 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
296 bool isBranch = false; local
299 isBranch = true;
554 isBranch = true;
560 isBranch = true;
567 isBranch = true;
577 if(!tryAddingSymbolicOperand(immediate + pcrel, isBranch, ins
[all...] |
| /external/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 98 if (!I->isBranch())
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 163 if (MI->isBranch() && !MI->isBarrier())
190 if (!I->isBranch())
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 434 bool isBranch(QueryType Type = AnyInBundle) const {
449 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type);
457 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
|
| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyCFGStackify.cpp | 201 if (!MBB.empty() && MBB.back().isTerminator() && !MBB.back().isBranch() &&
205 if (MBB.empty() || !MBB.back().isTerminator() || MBB.back().isBranch())
|
| /external/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 217 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
|
| /external/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.h | 226 bool isBranch : 1;
|
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_debug.cpp | 359 if (TID.isBranch()) {
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | BitTracker.cpp | 835 assert(!MI->isBranch() && "Unexpected branch instruction");
921 assert(MI->isBranch() && "Expecting branch instruction");
987 else if (!UseI->isBranch())
1100 while (It != End && !It->isBranch()) {
|
| H A D | HexagonVLIWPacketizer.cpp | 966 // Limit the tests to be "one-way", e.g. "if MI->isBranch and MJ->isInlineAsm",
967 // but not the symmetric case: "if MJ->isBranch and MI->isInlineAsm".
984 return MJ->isInlineAsm() || MJ->isBranch() || MJ->isBarrier() ||
1101 (J->isBranch() || J->isCall() || J->isBarrier());
1303 if (isDirectJump(I) && !J->isBranch() && !J->isCall() &&
|
| H A D | HexagonInstrInfo.cpp | 468 if (!I->isBranch())
1014 assert(get(opcode).isBranch() && "Should be a branching condition.");
1473 && !(MI->isBranch())
1484 return (getType(MI) == HexagonII::TypeCOMPOUND && MI->isBranch());
1489 return (MI->isBranch() && isPredicated(MI)) ||
2097 return isNewValue(MI) && MI->isBranch();
2102 return isNewValue(Opcode) && get(Opcode).isBranch() && isPredicated(Opcode);
2176 assert(get(Opcode).isBranch() &&
3764 assert(MI->isBranch());
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 309 if (MI.isBranch()) {
666 assert((!CurrI->isCall() && !CurrI->isReturn() && !CurrI->isBranch()) &&
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 423 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, argument
428 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
|
| /external/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 600 if (!TIE->isBranch())
605 if (!FIE->isBranch())
1599 if (IgnoreBr && I->isBranch())
|
| H A D | TwoAddressInstructionPass.cpp | 853 KillMI->isBranch() || KillMI->isTerminator())
911 OtherMI->isBranch() || OtherMI->isTerminator())
1087 OtherMI->isBranch() || OtherMI->isTerminator())
|