Searched refs:isDead (Results 1 - 25 of 72) sorted by relevance

123

/external/llvm/lib/CodeGen/
H A DDeadMachineInstructionElim.cpp46 bool isDead(const MachineInstr *MI) const;
55 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { function in class:DeadMachineInstructionElim
123 if (isDead(MI)) {
H A DMachineInstrBundle.cpp174 if (MO.isDead()) {
180 if (!MO.isDead())
185 if (!MO.isDead()) {
202 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); local
203 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |
330 if (!MO.isDead())
H A DLivePhysRegs.cpp98 if (Reg.second->isReg() && Reg.second->isDead())
H A DMachineCSE.cpp257 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end()))
545 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
550 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
H A DPHIElimination.cpp236 bool isDead = MPhi->getOperand(0).isDead(); local
304 if (isDead) {
332 if (DestLI.endIndex().isDead()) {
H A DMachineInstr.cpp177 bool isKill, bool isDead, bool isUndef,
197 IsDead = isDead;
318 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
344 if (isDead()) {
930 if (Check == CheckKillDead && MO.isDead() != OMO.isDead())
1228 /// the specified register or -1 if it is not found. If isDead is true, defs
1232 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, argument
1252 if (Found && (!isDead || MO.isDead()))
176 ChangeToRegister(unsigned Reg, bool isDef, bool isImp, bool isKill, bool isDead, bool isUndef, bool isDebug) argument
[all...]
H A DTailDuplication.cpp103 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
232 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); local
234 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
237 if (isDead) {
464 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, argument
487 if (isDead) {
H A DRegAllocFast.cpp649 } else if (MO.isDead()) {
660 } else if (MO.isDead()) {
676 bool Dead = MO.isDead();
946 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
1028 definePhysReg(MI, Reg, MO.isDead() ? regFree : regReserved);
H A DVirtRegMap.cpp389 if (MO.isDead())
401 } else if (!MO.isDead()) {
H A DLiveInterval.cpp62 assert(!Def.isDead() && "Cannot define a value at the dead slot");
534 bool isDead = true;
537 isDead = false;
540 if (isDead) {
H A DMachineLICM.cpp395 if (!MO.isDead())
911 } else if (!MO.isDead()) {
1365 if (MO.isReg() && MO.isDef() && !MO.isDead())
H A DPeepholeOptimizer.cpp908 while (CopyLike.getOperand(CurrentSrcIdx).isDead()) {
1347 if (MO.isImplicit() && MO.isDead())
1710 if (MO.isImplicit() && MO.isDead())
H A DMachineVerifier.cpp1146 if (MO->isDead())
1175 if (MO->isDead()) {
1588 if (S.end.isDead()) {
1627 if (!S.end.isDead()) {
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyStoreResults.cpp118 assert(!MI.getOperand(0).isDead() && "Dead flag set on store result");
/external/llvm/include/llvm/CodeGen/
H A DMachineOperand.h292 bool isDead() const { function in class:llvm::MachineOperand
542 /// operand. Note: This method ignores isKill and isDead properties.
572 bool isKill = false, bool isDead = false,
598 bool isKill = false, bool isDead = false,
604 assert(!(isDead && !isDef) && "Dead flag on non-def");
610 Op.IsDead = isDead;
H A DMachineInstr.h915 /// -1 if it is not found. If isDead is true, defs that are not dead are
921 bool isDead = false, bool Overlap = false,
926 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
928 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
/external/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp93 if (MO.isReg() && MO.isDead() && MO.isDef()) {
H A DAArch64ExpandPseudoInsts.cpp118 const bool DstIsDead = MI.getOperand(0).isDead();
183 const bool DstIsDead = MI.getOperand(0).isDead();
366 const bool DstIsDead = MI.getOperand(0).isDead();
535 bool DstIsDead = MI.getOperand(0).isDead();
/external/clang/lib/StaticAnalyzer/Checkers/
H A DExprInspectionChecker.cpp167 if (!SymReaper.isDead(Sym))
H A DSimpleStreamChecker.cpp192 bool IsSymDead = SymReaper.isDead(Sym);
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h406 bool isDead = false) {
407 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
H A DThumb2SizeReduction.cpp721 if (HasCC && MI->getOperand(NumOps-1).isDead())
816 if (HasCC && MI->getOperand(NumOps-1).isDead())
884 if (!MO.isDead())
994 if (MO && !MO->isDead())
H A DARMExpandPseudoInsts.cpp390 bool DstIsDead = MI.getOperand(OpIdx).isDead();
524 DstIsDead = MI.getOperand(OpIdx).isDead();
656 bool DstIsDead = MI.getOperand(0).isDead();
1000 bool DstIsDead = MI.getOperand(0).isDead();
1022 bool DstIsDead = MI.getOperand(0).isDead();
1075 bool DstIsDead = MI.getOperand(0).isDead();
1137 bool DstIsDead = MI.getOperand(OpIdx).isDead();
/external/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp196 Orig.isDead(),
/external/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp234 false /*isDead*/,
323 Src.isKill(), Src.isDead(), Src.isUndef(),

Completed in 464 milliseconds

123