MachineInstr.h revision b27087f5aa574f875598f4a309b7dd687c64a455
148486893f46d2e12e926682a3ecb908716bc66c4Chris Lattner//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 7ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 10a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// This file contains the declaration of the MachineInstr class, which is the 11ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman// basic representation for all target dependent machine instructions used by 12a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// the back end. 13a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 14a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner//===----------------------------------------------------------------------===// 1523ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 1623ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#ifndef LLVM_CODEGEN_MACHINEINSTR_H 1723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#define LLVM_CODEGEN_MACHINEINSTR_H 1823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 19103a64318bb716d68a4248996466900411d789beChris Lattner#include "llvm/CodeGen/MachineOperand.h" 2069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman#include "llvm/CodeGen/MemOperand.h" 21be583b914d8156b99d3da264d5adca37fee8dbc9John Criswell 22d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 23d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 24749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattnerclass TargetInstrDesc; 25b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengclass TargetInstrInfo; 266f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo; 27054c1f6cb6f3a680fe4b8447880ed960fd7fe441Chris Lattner 281fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721Chris Lattnertemplate <typename T> struct ilist_traits; 291fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721Chris Lattnertemplate <typename T> struct ilist; 30c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 31b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 328b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// MachineInstr - Representation of each machine instruction. 338b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// 349452b0797a80001920576d7e2ef4af05242cba69Chris Lattnerclass MachineInstr { 35749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc *TID; // Instruction descriptor. 36c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng unsigned short NumImplicitOps; // Number of implicit operands (which 379a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng // are determined at construction time). 389a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 39943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner std::vector<MachineOperand> Operands; // the operands 4069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman std::vector<MemOperand> MemOperands; // information on memory references 41f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineInstr *Prev, *Next; // Links for MBB's intrusive list. 42f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock *Parent; // Pointer to the owning basic block. 43c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke 44413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner // OperandComplete - Return true if it's illegal to add a new operand 45413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner bool OperandsComplete() const; 46a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 47466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner MachineInstr(const MachineInstr&); 489452b0797a80001920576d7e2ef4af05242cba69Chris Lattner void operator=(const MachineInstr&); // DO NOT IMPLEMENT 49c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 50c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos // Intrusive list support 511fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721Chris Lattner friend struct ilist_traits<MachineInstr>; 5262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner friend struct ilist_traits<MachineBasicBlock>; 53f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner void setParent(MachineBasicBlock *P) { Parent = P; } 546a175e01eb164baac5cc16311c474ff644ce17c1Vikram S. Advepublic: 55c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng /// MachineInstr ctor - This constructor creates a dummy MachineInstr with 5667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// TID NULL and no operands. 57c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng MachineInstr(); 58e8b57ef2603ed522083dc18e559ca4e20abf22aeVikram S. Adve 59d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// MachineInstr ctor - This constructor create a MachineInstr and add the 60a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner /// implicit operands. It reserves space for number of operands specified by 61749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner /// TargetInstrDesc. 62749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false); 63d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 647db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// MachineInstr ctor - Work exactly the same as the ctor above, except that 657db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// the MachineInstr is created and added to the end of the specified basic 667db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// block. 677db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// 68749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID); 69ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 70aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos ~MachineInstr(); 71aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 72f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner const MachineBasicBlock* getParent() const { return Parent; } 73f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock* getParent() { return Parent; } 7467f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng 7569244300b8a0112efb44b6273ecea4ca6264b8cfChris Lattner /// getDesc - Returns the target instruction descriptor of this 7667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// MachineInstr. 77749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &getDesc() const { return *TID; } 78ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenos 79c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke /// getOpcode - Returns the opcode of this MachineInstr. 80cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 81cb648f90a26eb05ae8d508d500ca12881df50824Dan Gohman int getOpcode() const; 829f495b54fa94dba4e0be59ba9736c7cf18d996d9Vikram S. Adve 83cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// Access to explicit operands of the instruction. 84cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 85943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner unsigned getNumOperands() const { return Operands.size(); } 86ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 87572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner const MachineOperand& getOperand(unsigned i) const { 88a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 89943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 90572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 91572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner MachineOperand& getOperand(unsigned i) { 92a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 93943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 94572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 956d6c3f86186333037f2fd3fb001e8b2998c080d9Chris Lattner 9619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// getNumExplicitOperands - Returns the number of non-implicit operands. 9719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// 9819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng unsigned getNumExplicitOperands() const; 99fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner 10069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// Access to memory operands of the instruction 10169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman unsigned getNumMemOperands() const { return MemOperands.size(); } 10269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 10369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman const MemOperand& getMemOperand(unsigned i) const { 10469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman assert(i < getNumMemOperands() && "getMemOperand() out of range!"); 10569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman return MemOperands[i]; 10669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 10769de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman MemOperand& getMemOperand(unsigned i) { 10869de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman assert(i < getNumMemOperands() && "getMemOperand() out of range!"); 10969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman return MemOperands[i]; 11069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 11169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 112fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// isIdenticalTo - Return true if this instruction is identical to (same 113fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// opcode and same operands as) the specified instruction. 114fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner bool isIdenticalTo(const MachineInstr *Other) const { 115fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner if (Other->getOpcode() != getOpcode() || 116846c1b49365be588b5aaddd02916e46c2422ae6fChris Lattner Other->getNumOperands() != getNumOperands()) 117fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner return false; 118fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 119fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner if (!getOperand(i).isIdenticalTo(Other->getOperand(i))) 120fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner return false; 121fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner return true; 122fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner } 123a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 124b5159ed0cb7943e5938782f7693beb18342165ceTanya Lattner /// clone - Create a copy of 'this' instruction that is identical in 125b5159ed0cb7943e5938782f7693beb18342165ceTanya Lattner /// all ways except the the instruction has no parent, prev, or next. 126943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner MachineInstr* clone() const { return new MachineInstr(*this); } 1276b560918426182d2b46b899d609911d49f6739f7Chris Lattner 1286b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// removeFromParent - This method unlinks 'this' from the containing basic 1296b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block, and returns it, but does not delete it. 1306b560918426182d2b46b899d609911d49f6739f7Chris Lattner MachineInstr *removeFromParent(); 1316b560918426182d2b46b899d609911d49f6739f7Chris Lattner 1326b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// eraseFromParent - This method unlinks 'this' from the containing basic 1336b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block and deletes it. 1346b560918426182d2b46b899d609911d49f6739f7Chris Lattner void eraseFromParent() { 1356b560918426182d2b46b899d609911d49f6739f7Chris Lattner delete removeFromParent(); 1366b560918426182d2b46b899d609911d49f6739f7Chris Lattner } 137466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 138bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng /// isDebugLabel - Returns true if the MachineInstr represents a debug label. 139bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng /// 140bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng bool isDebugLabel() const; 141bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng 1426130f66eaae89f8878590796977678afa8448926Evan Cheng /// readsRegister - Return true if the MachineInstr reads the specified 1436130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there 1446130f66eaae89f8878590796977678afa8448926Evan Cheng /// is a read of a super-register. 1456130f66eaae89f8878590796977678afa8448926Evan Cheng bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 1466130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 1476130f66eaae89f8878590796977678afa8448926Evan Cheng } 1486130f66eaae89f8878590796977678afa8448926Evan Cheng 1496130f66eaae89f8878590796977678afa8448926Evan Cheng /// killsRegister - Return true if the MachineInstr kills the specified 1506130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there is 1516130f66eaae89f8878590796977678afa8448926Evan Cheng /// a kill of a super-register. 1526130f66eaae89f8878590796977678afa8448926Evan Cheng bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 1536130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 1546130f66eaae89f8878590796977678afa8448926Evan Cheng } 1556130f66eaae89f8878590796977678afa8448926Evan Cheng 1566130f66eaae89f8878590796977678afa8448926Evan Cheng /// modifiesRegister - Return true if the MachineInstr modifies the 1576130f66eaae89f8878590796977678afa8448926Evan Cheng /// specified register. If TargetRegisterInfo is passed, then it also checks 1586130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a def of a super-register. 1596130f66eaae89f8878590796977678afa8448926Evan Cheng bool modifiesRegister(unsigned Reg, 1606130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const { 1616130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterDefOperandIdx(Reg, false, TRI) != -1; 1626130f66eaae89f8878590796977678afa8448926Evan Cheng } 1636130f66eaae89f8878590796977678afa8448926Evan Cheng 1646130f66eaae89f8878590796977678afa8448926Evan Cheng /// registerDefIsDead - Returns true if the register is dead in this machine 1656130f66eaae89f8878590796977678afa8448926Evan Cheng /// instruction. If TargetRegisterInfo is passed, then it also checks 1666130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a dead def of a super-register. 1676130f66eaae89f8878590796977678afa8448926Evan Cheng bool registerDefIsDead(unsigned Reg, 1686130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const { 1696130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterDefOperandIdx(Reg, true, TRI) != -1; 1706130f66eaae89f8878590796977678afa8448926Evan Cheng } 1716130f66eaae89f8878590796977678afa8448926Evan Cheng 172faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng /// findRegisterUseOperandIdx() - Returns the operand index that is a use of 17332eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng /// the specific register or -1 if it is not found. It further tightening 17476d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng /// the search criteria to a use that kills the register if isKill is true. 1756130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, 1766130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 1776130f66eaae89f8878590796977678afa8448926Evan Cheng 1786130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns 1796130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 1806130f66eaae89f8878590796977678afa8448926Evan Cheng MachineOperand *findRegisterUseOperand(unsigned Reg,bool isKill = false, 1816130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 1826130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); 1836130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 1846130f66eaae89f8878590796977678afa8448926Evan Cheng } 185576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 1866130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperandIdx() - Returns the operand index that is a def of 1876130f66eaae89f8878590796977678afa8448926Evan Cheng /// the specific register or -1 if it is not found. It further tightening 1886130f66eaae89f8878590796977678afa8448926Evan Cheng /// the search criteria to a def that is dead the register if isDead is true. 1896130f66eaae89f8878590796977678afa8448926Evan Cheng /// If TargetRegisterInfo is passed, then it also checks if there is a def of 1906130f66eaae89f8878590796977678afa8448926Evan Cheng /// a super-register. 1916130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false, 1926130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 1936130f66eaae89f8878590796977678afa8448926Evan Cheng 1946130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns 1956130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 1966130f66eaae89f8878590796977678afa8448926Evan Cheng MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false, 1976130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 1986130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI); 1996130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 2006130f66eaae89f8878590796977678afa8448926Evan Cheng } 20119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 202f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// findFirstPredOperandIdx() - Find the index of the first operand in the 203f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// operand list that is used to represent the predicate. It returns -1 if 204f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// none is found. 205f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng int findFirstPredOperandIdx() const; 206b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 20732dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due 20832dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng /// to two addr elimination. 20932dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng bool isRegReDefinedByTwoAddr(unsigned Reg) const; 21032dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 2119a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// copyKillDeadInfo - Copies kill / dead operand properties from MI. 2129a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// 213576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng void copyKillDeadInfo(const MachineInstr *MI); 2149a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 21519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// copyPredicates - Copies predicate operand(s) from MI. 21619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng void copyPredicates(const MachineInstr *MI); 21719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 218b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterKilled - We have determined MI kills a register. Look for the 219b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, 220b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// add a implicit operand if it's not found. Returns true if the operand 221b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// exists / is added. 2226f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterKilled(unsigned IncomingReg, 2236f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 224b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 225b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 226b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterDead - We have determined MI defined a register without a use. 227b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// Look for the operand that defines it and mark it as IsDead. If 228b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// AddIfNotFound is true, add a implicit operand if it's not found. Returns 229b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// true if the operand exists / is added. 2306f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, 231b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 232b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 233b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng /// copyKillDeadInfo - Copies killed/dead information from one instr to another 234b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson void copyKillDeadInfo(MachineInstr *OldMI, 2356f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo); 236b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 237b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng /// isSafeToMove - Return true if it is safe to this instruction. If SawStore 238b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng /// true, it means there is a store (or call) between the instruction the 239b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng /// localtion and its intended destination. 240b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore); 241b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 242a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // 243a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // Debugging support 244fa78fbf446b505767e838f9c188707183c57fc9cChris Lattner // 2455c7e326585f3a543388ba871c3425f7664cd9143Bill Wendling void print(std::ostream *OS, const TargetMachine *TM) const { 2465c7e326585f3a543388ba871c3425f7664cd9143Bill Wendling if (OS) print(*OS, TM); 247b5ebf15b2b2ce8989caf1a1114b05d80b0f9bd48Bill Wendling } 248e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner void print(std::ostream &OS, const TargetMachine *TM = 0) const; 2495c7e326585f3a543388ba871c3425f7664cd9143Bill Wendling void print(std::ostream *OS) const { if (OS) print(*OS); } 250572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner void dump() const; 2512f898d207466bf233b55607e404baca302bc7b5eChris Lattner 252413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner //===--------------------------------------------------------------------===// 25362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Accessors used to build up machine instructions. 2547ad6be7b01a902f532eebb607306f7b3f4627718Chris Lattner 25562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// addOperand - Add the specified operand to the instruction. If it is an 25662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// implicit operand, it is added to the end of the operand list. If it is 25762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// an explicit operand it is added at the end of the explicit operand list 25862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// (before the first implicit operand). 25962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void addOperand(const MachineOperand &Op); 26062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 2615080f4d9919d39b367891dc51e739c571a66036cChris Lattner /// setDesc - Replace the instruction descriptor (thus opcode) of 26267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// the current instruction with a new one. 2633c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 2645080f4d9919d39b367891dc51e739c571a66036cChris Lattner void setDesc(const TargetInstrDesc &tid) { TID = &tid; } 2653c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner 2663c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// RemoveOperand - Erase an operand from an instruction, leaving it with one 2673c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// fewer operand than it started with. 2683c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 26962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveOperand(unsigned i); 27062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 27169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// addMemOperand - Add a MemOperand to the machine instruction, referencing 27269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// arbitrary storage. 27369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman void addMemOperand(const MemOperand &MO) { 27469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman MemOperands.push_back(MO); 27569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 27669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 277943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattnerprivate: 27862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// getRegInfo - If this instruction is embedded into a MachineFunction, 27962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return the MachineRegisterInfo object for the current function, otherwise 28062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return null. 28162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *getRegInfo(); 282d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 283d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// addImplicitDefUseOperands - Add all implicit def and use operands to 284d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// this instruction. 28567f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng void addImplicitDefUseOperands(); 28662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 28762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 28862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 28962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands already be on their use lists. 29062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveRegOperandsFromUseLists(); 29162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 29262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// AddRegOperandsToUseLists - Add all of the register operands in 29362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 29462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands not be on their use lists yet. 29562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo); 296a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve}; 29723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 298b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 299593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve// Debugging Support 300593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve 301e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattnerinline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) { 302e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner MI.print(OS); 303e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner return OS; 304e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner} 305136c9f4062b0fe6d864ebc2bc2b0cbada931a28eVikram S. Adve 306d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 307d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 30823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#endif 309