/external/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterInfo.cpp | 35 int SPAdj, 34 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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H A D | SIRegisterInfo.cpp | 257 int SPAdj, unsigned FIOperandNum, 384 unsigned TmpReg = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, SPAdj); 256 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/BPF/ |
H A D | BPFRegisterInfo.cpp | 45 int SPAdj, unsigned FIOperandNum, 47 assert(SPAdj == 0 && "Unexpected"); 44 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPURegisterInfo.cpp | 39 int SPAdj, 38 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, RegScavenger *RS) const argument
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.cpp | 92 int SPAdj, unsigned FIOperandNum, 94 assert(SPAdj == 0 && "Unexpected"); 91 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 105 int SPAdj, unsigned FIOperandNum, 107 assert(SPAdj == 0 && "Unexpected"); 104 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 59 int SPAdj, unsigned FIOperandNum, 61 assert(SPAdj == 0 && "Outgoing arguments should be part of the frame"); 58 eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegisterInfo.cpp | 55 MachineBasicBlock::iterator II, int SPAdj, 57 assert(SPAdj == 0); 54 eliminateFrameIndex( MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger * ) const argument
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H A D | WebAssemblyPEI.cpp | 101 int &SPAdj); 829 // Store SPAdj at exit of a basic block. 837 int SPAdj = 0; local 843 SPAdj = SPState[StackPred->getNumber()]; 846 replaceFrameIndices(BB, Fn, SPAdj); 847 SPState[BB->getNumber()] = SPAdj; 855 int SPAdj = 0; local 856 replaceFrameIndices(&BB, Fn, SPAdj); 861 int &SPAdj) { 879 SPAdj 860 replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn, int &SPAdj) argument 991 int SPAdj = 0; local [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 139 /// available and do the appropriate bookkeeping. SPAdj is the stack 143 MachineBasicBlock::iterator I, int SPAdj); 144 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { argument 145 return scavengeRegister(RegClass, MBBI, SPAdj);
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 116 int SPAdj, unsigned FIOp, 120 assert(SPAdj == 0 && "Unexpected"); 115 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOp, RegScavenger *RS) const argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsRegisterInfo.cpp | 263 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, argument
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 166 int SPAdj, unsigned FIOperandNum, 168 assert(SPAdj == 0 && "Unexpected"); 165 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/CodeGen/ |
H A D | RegisterScavenging.cpp | 368 int SPAdj) { 424 TRI->eliminateFrameIndex(II, SPAdj, FIOperandNum, this); 432 TRI->eliminateFrameIndex(II, SPAdj, FIOperandNum, this); 366 scavengeRegister(const TargetRegisterClass *RC, MachineBasicBlock::iterator I, int SPAdj) argument
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H A D | PrologEpilogInserter.cpp | 92 int &SPAdj); 813 // Store SPAdj at exit of a basic block. 821 int SPAdj = 0; local 827 SPAdj = SPState[StackPred->getNumber()]; 830 replaceFrameIndices(BB, Fn, SPAdj); 831 SPState[BB->getNumber()] = SPAdj; 839 int SPAdj = 0; local 840 replaceFrameIndices(&BB, Fn, SPAdj); 845 int &SPAdj) { 863 SPAdj 844 replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn, int &SPAdj) argument 975 int SPAdj = 0; local [all...] |
H A D | TargetInstrInfo.cpp | 917 int SPAdj = MI->getOperand(0).getImm(); local 918 SPAdj = TFI->alignSPAdjust(SPAdj); 922 SPAdj = -SPAdj; 924 return SPAdj;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 356 int SPAdj, unsigned FIOperandNum, 358 assert(SPAdj == 0 && "Unexpected"); 355 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 262 int SPAdj, unsigned FIOperandNum, 264 assert(SPAdj == 0 && "Unexpected"); 261 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 538 int SPAdj, unsigned FIOperandNum, 593 FIOffset += SPAdj; 537 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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H A D | X86InstrInfo.cpp | 2096 int SPAdj = (MI->getOperand(0).getImm() + StackAlign - 1) / StackAlign * local 2099 SPAdj -= MI->getOperand(1).getImm(); 2102 return SPAdj; 2104 return -SPAdj;
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 680 int SPAdj, unsigned FIOperandNum, 694 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); 696 // PEI::scavengeFrameVirtualRegs() cannot accurately track SPAdj because the 679 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 749 int SPAdj, unsigned FIOperandNum, 751 assert(SPAdj == 0 && "Unexpected"); 748 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
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