Searched defs:allowsMisalignedMemoryAccesses (Results 1 - 8 of 8) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 162 Mips16TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:Mips16TargetLowering
|
| H A D | MipsSEISelLowering.cpp | 333 MipsSETargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:MipsSETargetLowering
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 499 bool SystemZTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:SystemZTargetLowering
|
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 434 bool SITargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:SITargetLowering
1681 !allowsMisalignedMemoryAccesses(LoadVT, AS, Align, nullptr)) {
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2015 X86TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:X86TargetLowering
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 800 bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:AArch64TargetLowering
7168 (allowsMisalignedMemoryAccesses(MVT::f128, 0, 1, &Fast) && Fast)))
7173 (allowsMisalignedMemoryAccesses(MVT::i64, 0, 1, &Fast) && Fast)))
7178 (allowsMisalignedMemoryAccesses(MVT::i32, 0, 1, &Fast) && Fast)))
8603 // be included in TLI.allowsMisalignedMemoryAccesses(), and there should be
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11491 bool PPCTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:PPCTargetLowering
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10634 bool ARMTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, function in class:ARMTargetLowering
10689 (allowsMisalignedMemoryAccesses(MVT::v2f64, 0, 1, &Fast) && Fast))) {
10693 (allowsMisalignedMemoryAccesses(MVT::f64, 0, 1, &Fast) &&
|
Completed in 453 milliseconds