| /art/compiler/utils/arm64/ |
| H A D | managed_register_arm64_test.cc | 706 EXPECT_TRUE(vixl::s1.Is(Arm64Assembler::reg_s(S1)));
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| /art/compiler/utils/ |
| H A D | assembler_thumb_test.cc | 55 int CompareIgnoringSpace(const char* s1, const char* s2) { argument
56 while (*s1 != '\0') {
57 while (isspace(*s1)) ++s1;
59 if (*s1 == '\0' || *s1 != *s2) {
62 ++s1;
65 return *s1 - *s2;
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| /art/runtime/arch/arm/ |
| H A D | quick_entrypoints_arm.S | 456 vstrne d0, [r9] @ store s0-s1/d0 into result pointer
502 vstr d0, [r10] @ Store s0-s1/d0 into result pointer
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| /art/runtime/arch/arm64/ |
| H A D | quick_entrypoints_arm64.S | 765 LOADREG x15 4 s1 .LfillRegisters
890 LOADREG x15 4 s1 .LfillRegisters2
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| /art/runtime/arch/ |
| H A D | memcmp16.cc | 22 int32_t memcmp16_generic_static(const uint16_t* s0, const uint16_t* s1, size_t count);
23 int32_t memcmp16_generic_static(const uint16_t* s0, const uint16_t* s1, size_t count) { argument
25 if (s0[i] != s1[i]) {
26 return static_cast<int32_t>(s0[i]) - static_cast<int32_t>(s1[i]);
36 int32_t MemCmp16Testing(const uint16_t* s0, const uint16_t* s1, size_t count) { argument
37 return MemCmp16(s0, s1, count);
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| H A D | memcmp16.h | 35 extern "C" uint32_t __memcmp16(const uint16_t* s0, const uint16_t* s1, size_t count);
41 static inline int32_t MemCmp16(const uint16_t* s0, const uint16_t* s1, size_t count) { argument
43 if (s0[i] != s1[i]) {
44 return static_cast<int32_t>(s0[i]) - static_cast<int32_t>(s1[i]);
50 extern "C" int32_t memcmp16_generic_static(const uint16_t* s0, const uint16_t* s1, size_t count);
60 int32_t MemCmp16Testing(const uint16_t* s0, const uint16_t* s1, size_t count);
|
| H A D | memcmp16_test.cc | 37 int32_t memcmp16_compare(const uint16_t* s0, const uint16_t* s1, size_t count) { argument
39 if (s0[i] != s1[i]) {
40 return static_cast<int32_t>(s0[i]) - static_cast<int32_t>(s1[i]);
55 uint16_t *s1, *s2; // Use raw pointers to simplify using clobbered addresses local
88 s1 = new uint16_t[count1];
91 s1 = reinterpret_cast<uint16_t*>(0xebad1001);
106 s1[i] = static_cast<uint16_t>(r.next() & 0xFFFF);
107 s2[i] = s1[i];
110 s1[i] = static_cast<uint16_t>(r.next() & 0xFFFF);
117 s1[
[all...] |
| /art/runtime/arch/mips/ |
| H A D | asm_support_mips.S | 27 #define rSELF $s1
|
| H A D | jni_entrypoints_mips.S | 43 move $a0, $s1 # pass Thread::Current()
|
| H A D | quick_entrypoints_mips.S | 66 sw $s1, 56($sp)
353 sw $s1, 8($sp)
411 lw $s1, 8($sp)
467 lw $s1, 68($a0)
637 addiu $sp, $sp, -SPILL_SIZE # spill s0, s1, fp, ra and gp
644 sw $s1, 4($sp)
650 move $s1, $a3 # move managed thread pointer into s1
727 lw $s1, 4($sp)
763 addiu $sp, $sp, -SPILL_SIZE # spill s0, s1, f
[all...] |
| /art/runtime/arch/mips64/ |
| H A D | asm_support_mips64.S | 27 #define rSELF $s1
|
| H A D | jni_entrypoints_mips64.S | 47 move $a0, $s1 # pass Thread::Current()
|
| H A D | quick_entrypoints_mips64.S | 74 sd $s1, 80($sp)
397 sd $s1, 24($sp)
454 ld $s1, 24($sp)
550 ld $s1, 136($a0)
755 # push a4, a5, s0(rSUSPEND), s1(rSELF), s8, ra onto the stack
762 sd $s1, 24($sp)
772 move $s1, $a3 # move managed thread pointer into s1 (rSELF)
811 # pop a4, a5, s1(rSELF), s8, ra off of the stack
818 ld $s1, 2
[all...] |
| /art/runtime/base/ |
| H A D | logging.h | 141 // Helper for CHECK_STRxx(s1,s2) macros.
142 #define CHECK_STROP(s1, s2, sense) \
143 if (UNLIKELY((strcmp(s1, s2) == 0) != sense)) \
145 << "\"" << s1 << "\"" \
149 // Check for string (const char*) equality between s1 and s2, LOG(FATAL) if not.
150 #define CHECK_STREQ(s1, s2) CHECK_STROP(s1, s2, true)
151 #define CHECK_STRNE(s1, s2) CHECK_STROP(s1, s2, false)
189 #define DCHECK_STREQ(s1, s
[all...] |
| /art/runtime/ |
| H A D | class_linker_test.cc | 942 ArtField* s1 = mirror::Class::FindStaticField(soa.Self(), statics, "s1", "B"); local
943 EXPECT_EQ(s1->GetTypeAsPrimitiveType(), Primitive::kPrimByte);
944 EXPECT_EQ(5, s1->GetByte(statics.Get()));
945 s1->SetByte<false>(statics.Get(), 6);
987 EXPECT_EQ(6, s1->GetByte(statics.Get()));
|
| H A D | intern_table_test.cc | 103 Handle<mirror::String> s1(hs.NewHandle(t.InternWeak(world.Get())));
110 p.Expect(s1.Get());
|
| /art/runtime/interpreter/mterp/arm/ |
| H A D | fbinop.S | 3 * specifies an instruction that performs "s2 = s0 op s1". Because we
15 flds s1, [r3] @ s1<- vCC
|
| H A D | fbinop2addr.S | 4 * "s2 = s0 op s1".
13 flds s1, [r3] @ s1<- vB
|
| H A D | funop.S | 3 * line that specifies an instruction that performs "s1 = op s0".
13 $instr @ s1<- op
16 fsts s1, [r9] @ vA<- s1
|
| H A D | op_cmpg_float.S | 25 flds s1, [r3] @ s1<- vCC
26 vcmpe.f32 s0, s1 @ compare (vBB, vCC)
|
| H A D | op_cmpl_float.S | 25 flds s1, [r3] @ s1<- vCC
26 vcmpe.f32 s0, s1 @ compare (vBB, vCC)
|
| H A D | op_long_to_double.S | 16 vcvt.f64.s32 d1, s1 @ d1<- (double)(vAAh)
|
| /art/runtime/interpreter/mterp/arm64/ |
| H A D | fbinop.S | 6 * form: <op> s0, s0, s1
12 GET_VREG s1, w1
|
| H A D | fbinop2addr.S | 4 * "s2 = s0 op s1".
12 GET_VREG s1, w3
|
| H A D | op_rem_float_2addr.S | 5 GET_VREG s1, w3
|