Searched refs:SETEQ (Results 1 - 25 of 29) sorted by relevance

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/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.cpp208 ISD::SETEQ);
222 ISD::SETEQ);
259 Quotient, Quotient_A_One, ISD::SETEQ);
263 Quotient_S_One, Div, ISD::SETEQ);
275 Remainder, Remainder_S_Den, ISD::SETEQ);
279 Remainder_A_Den, Rem, ISD::SETEQ);
H A DR600ISelLowering.cpp450 case ISD::SETEQ:
/external/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp134 case ISD::SETEQ:
1297 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
1299 if ((C1 == 0) == (Cond == ISD::SETEQ)) {
1306 Cond = ISD::SETEQ;
1331 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
1340 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
1462 case ISD::SETEQ: return DAG.getConstant(0, dl, VT);
1481 case ISD::SETEQ:
1505 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
1535 (Cond == ISD::SETEQ || Con
[all...]
H A DLegalizeIntegerTypes.cpp944 case ISD::SETEQ:
1362 N->getOperand(2), ISD::SETEQ);
1619 ISD::SETEQ);
2194 ISD::SETEQ : ISD::SETNE);
2466 RHS, DAG.getConstant(0, dl, VT), ISD::SETEQ);
2708 if (CCCode == ISD::SETEQ || CCCode == ISD::SETNE) {
2836 LHSHi, RHSHi, ISD::SETEQ, false,
2840 LHSHi, RHSHi, ISD::SETEQ);
H A DSelectionDAGDumper.cpp346 case ISD::SETEQ: return "seteq";
H A DLegalizeDAG.cpp1884 case ISD::SETEQ:
1886 InvCC = CCCode == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ;
3079 Res, Node->getOperand(2), ISD::SETEQ);
3567 ISD::SETEQ : ISD::SETNE);
4243 ISD::SETEQ);
H A DSelectionDAGBuilder.cpp1547 CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
1670 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1757 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()),
1778 CB.CC == ISD::SETEQ)
1781 CB.CC == ISD::SETEQ) {
2058 ISD::SETEQ);
8150 ISD::SETEQ);
8295 CC = ISD::SETEQ;
H A DSelectionDAG.cpp279 case ISD::SETEQ:
334 case ISD::SETOEQ: // SETEQ & SETU[LG]E
335 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
1954 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1972 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
H A DLegalizeFloatTypes.cpp1062 ISD::SETEQ);
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h836 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
861 SETEQ, // 1 X 0 0 1 True if equal enumerator in enum:llvm::ISD::CondCode
/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp698 CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
699 CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
700 CCs[RTLIB::OEQ_F128] = ISD::SETEQ;
719 CCs[RTLIB::O_F32] = ISD::SETEQ;
720 CCs[RTLIB::O_F64] = ISD::SETEQ;
721 CCs[RTLIB::O_F128] = ISD::SETEQ;
H A DAnalysis.cpp187 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
202 case ICmpInst::ICMP_EQ: return ISD::SETEQ;
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp1995 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
1997 // SETEQ/SETNE comparison with 16-bit immediate, fold it.
2039 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
2041 // SETEQ/SETNE comparison with 16-bit immediate, fold it.
2101 case ISD::SETEQ: return PPC::PRED_EQ;
2132 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ
2173 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
2181 case ISD::SETEQ:
2217 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
2225 case ISD::SETEQ
[all...]
H A DPPCISelLowering.cpp2247 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
2266 if (C->isNullValue() && CC == ISD::SETEQ) {
2292 if (LHSVT.isInteger() && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
6045 case ISD::SETEQ:
6077 case ISD::SETEQ:
6926 return DAG.getSetCC(dl, MVT::v4i1, LoadedVect, FPZeros, ISD::SETEQ);
10641 assert((CC == ISD::SETEQ || CC == ISD::SETNE) &&
10645 bool isBDNZ = (CC == ISD::SETEQ && Val) ||
10662 isa<ConstantSDNode>(RHS) && (CC == ISD::SETEQ || CC == ISD::SETNE) &&
10670 if (CC == ISD::SETEQ) // Con
[all...]
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1106 case ISD::SETEQ:
1684 SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, zero, REM_Part, LHS_Hi, ISD::SETEQ);
1687 SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, zero, DIV_Part, zero, ISD::SETEQ);
1761 ISD::SETEQ);
1775 ISD::SETEQ);
1812 Quotient, Quotient_A_One, ISD::SETEQ);
1816 Quotient_S_One, Div, ISD::SETEQ);
1828 Remainder, Remainder_S_Den, ISD::SETEQ);
1832 Remainder_A_Den, Rem, ISD::SETEQ);
2110 SDValue ExpEqNegOne = DAG.getSetCC(SL, SetCCVT, NegOne, Exp, ISD::SETEQ);
[all...]
H A DSIISelLowering.cpp1545 SDValue CmpDen = DAG.getSetCC(SL, MVT::i1, DenHi, Scale0Hi, ISD::SETEQ);
1546 SDValue CmpNum = DAG.getSetCC(SL, MVT::i1, NumHi, Scale1Hi, ISD::SETEQ);
H A DR600ISelLowering.cpp1984 case ISD::SETEQ: {
/external/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp602 case ISD::SETEQ:
/external/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h1680 X86_INTRINSIC_DATA(sse2_comieq_sd, COMI, X86ISD::COMI, ISD::SETEQ),
1723 X86_INTRINSIC_DATA(sse2_ucomieq_sd, COMI, X86ISD::UCOMI, ISD::SETEQ),
1752 X86_INTRINSIC_DATA(sse_comieq_ss, COMI, X86ISD::COMI, ISD::SETEQ),
1763 X86_INTRINSIC_DATA(sse_ucomieq_ss, COMI, X86ISD::UCOMI, ISD::SETEQ),
H A DX86ISelLowering.cpp4047 case ISD::SETEQ: return X86::COND_E;
4114 case ISD::SETEQ: return X86::COND_E;
14189 X86::CondCode Cond = CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B;
14216 case ISD::SETEQ: SSECC = 0; break;
14288 case ISD::SETEQ:
14335 case ISD::SETEQ: Opc = X86ISD::PCMPEQM; break;
14499 case ISD::SETEQ: CmpMode = 0x04; break;
14521 case ISD::SETEQ: Opc = X86ISD::PCMPEQ; break;
14702 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
14713 (CC == ISD::SETEQ || C
[all...]
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp199 { RTLIB::O_F32, "__unordsf2vfp", ISD::SETEQ },
209 { RTLIB::O_F64, "__unorddf2vfp", ISD::SETEQ },
274 { RTLIB::UNE_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ },
280 { RTLIB::O_F64, "__aeabi_dcmpun", CallingConv::ARM_AAPCS, ISD::SETEQ },
292 { RTLIB::UNE_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ },
298 { RTLIB::O_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, ISD::SETEQ },
1316 case ISD::SETEQ: return ARMCC::EQ;
1334 case ISD::SETEQ:
3763 CC = ISD::SETEQ;
3827 (CC == ISD::SETEQ || C
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp957 case ISD::SETEQ:
1692 Op->getOperand(2), ISD::SETEQ);
1698 lowerMSASplatImm(Op, 2, DAG), ISD::SETEQ);
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp820 case ISD::SETEQ:
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1056 case ISD::SETEQ:
1085 case ISD::SETEQ:
1190 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
1199 // are SETEQ and SETNE. They're the only ones we can safely use CMN for in
1268 if (isNullConstant(SubOp0) && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
1269 // See emitComparison() on why we can only do this for SETEQ and SETNE.
1493 if ((CC == ISD::SETEQ || CC == ISD::SETNE) && isa<ConstantSDNode>(RHS)) {
3605 assert((CC == ISD::SETEQ || CC == ISD::SETNE) &&
3632 if (CC == ISD::SETEQ) {
4414 ISD::SETEQ, d
[all...]
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1383 case ISD::SETEQ: return SPCC::ICC_E;
1401 case ISD::SETEQ:

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